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drm/rockchip: dsi2: fix DSI_VID_TX_CFG configuration errors

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Change-Id: Ibc7483323fc50985eb2542af3ab4193b7c7ad04e
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
This commit is contained in:
Guochun Huang
2022-06-15 12:53:16 +00:00
committed by Tao Huang
parent d416f690ee
commit 8cfe3a4ed8
1 changed files with 9 additions and 16 deletions
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25
drivers/gpu/drm/rockchip/dw-mipi-dsi2-rockchip.c
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@@ -378,17 +378,24 @@ static void dw_mipi_dsi2_set_vid_mode(struct dw_mipi_dsi2 *dsi2)
u32 val = 0, mode;
int ret;
if (dsi2->mode_flags & MIPI_DSI_MODE_VIDEO_HFP)
val |= BLK_HFP_HS_EN;
if (dsi2->mode_flags & MIPI_DSI_MODE_VIDEO_HBP)
val |= BLK_HBP_HS_EN;
if (dsi2->mode_flags & MIPI_DSI_MODE_VIDEO_HSA)
val |= BLK_HSA_HS_EN;
if (dsi2->mode_flags & MIPI_DSI_MODE_VIDEO_BURST)
val |= VID_MODE_TYPE_BURST;
else if (dsi2->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
val |= VID_MODE_TYPE_NON_BURST_SYNC_PULSES;
else
val |= VID_MODE_TYPE_NON_BURST_SYNC_EVENTS;
regmap_write(dsi2->regmap, DSI2_DSI_VID_TX_CFG, val);
regmap_write(dsi2->regmap, DSI2_MODE_CTRL, VIDEO_MODE);
ret = regmap_read_poll_timeout(dsi2->regmap, DSI2_MODE_STATUS,
mode, mode & VIDEO_MODE,
@@ -673,20 +680,6 @@ static void dw_mipi_dsi2_tx_option_set(struct dw_mipi_dsi2 *dsi2)
if (dsi2->scrambling_en)
regmap_write(dsi2->regmap, DSI2_DSI_SCRAMBLING_CFG,
SCRAMBLING_EN);
val = 0;
if (dsi2->mode_flags & MIPI_DSI_MODE_VIDEO_HFP)
val |= BLK_HFP_HS_EN;
if (dsi2->mode_flags & MIPI_DSI_MODE_VIDEO_HBP)
val |= BLK_HBP_HS_EN;
if (dsi2->mode_flags & MIPI_DSI_MODE_VIDEO_HSA)
val |= BLK_HSA_HS_EN;
regmap_write(dsi2->regmap, DSI2_DSI_VID_TX_CFG, val);
/* configure the maximum return packet size that periphera can send */
}
static void dw_mipi_dsi2_ipi_color_coding_cfg(struct dw_mipi_dsi2 *dsi2)