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drm/rockchip: dsi: Allow transmission of commands in high-speed in video mode

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DWC_mipi_dsi_host can be configured to send the low-power (LP)
commands during the HS video mode transmission. To enable this
feature, set the lp_cmd_en bit of the VID_MODE_CFG register to 1.
In this case, it is necessary to calculate the time available,
in bytes, to transmit a command in LP mode to Horizontal Front Porch (HFP),
Vertical Sync Active (VSA), Vertical Back Porch (VBP), and
Vertical Front Porch (VFP) regions.

Bits 8 to 13 of the VID_MODE_CFG register indicates if DWC_mipi_dsi_host
can go to LP when in idle. If the lp_cmd_en bit is set (1'b1) and
non-video packets are in queue, DWC_mipi_dsi_host ignores the LP
configuration and transmits LP commands, even if it is not allowed
to enter LP in a specific region. After the LP commands transmission,
DWC_mipi_dsi_host remains in LP until a sync event occurs.

If the lp_cmd_en bit of the VID_MODE_CFG register is 0, the commands
are sent in high-speed in Video Mode. In this case, the DWC_mipi_dsi_host
automatically determines the area where each command can be sent and no
programming or calculation is required.

Change-Id: Id47982c2c7605be17c4d295707fd5496f32f79fe
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
This commit is contained in:
Wyon Bi
2018-10-08 10:58:45 +08:00
parent 2a45f7557a
commit 8d080a0b20
1 changed files with 9 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
drivers/gpu/drm/rockchip/dw-mipi-dsi.c
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@@ -796,10 +796,13 @@ static int dw_mipi_dsi_host_detach(struct mipi_dsi_host *host,
static void dw_mipi_dsi_set_transfer_mode(struct dw_mipi_dsi *dsi, int flags)
{
if (flags & MIPI_DSI_MSG_USE_LPM) {
regmap_update_bits(dsi->regmap, DSI_VID_MODE_CFG,
LP_CMD_EN, LP_CMD_EN);
regmap_write(dsi->regmap, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP);
regmap_update_bits(dsi->regmap, DSI_LPCLK_CTRL,
PHY_TXREQUESTCLKHS, 0);
} else {
regmap_update_bits(dsi->regmap, DSI_VID_MODE_CFG, LP_CMD_EN, 0);
regmap_write(dsi->regmap, DSI_CMD_MODE_CFG, 0);
regmap_update_bits(dsi->regmap, DSI_LPCLK_CTRL,
PHY_TXREQUESTCLKHS, PHY_TXREQUESTCLKHS);
@@ -963,15 +966,14 @@ static const struct mipi_dsi_host_ops dw_mipi_dsi_host_ops = {
static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
{
u32 val;
u32 val = LP_VACT_EN | LP_VFP_EN | LP_VBP_EN | LP_VSA_EN |
LP_HFP_EN | LP_HBP_EN;
val = LP_VACT_EN | LP_VFP_EN | LP_VBP_EN | LP_VSA_EN | LP_CMD_EN;
if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HFP)
val &= ~LP_HFP_EN;
if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HFP))
val |= LP_HFP_EN;
if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HBP))
val |= LP_HBP_EN;
if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HBP)
val &= ~LP_HBP_EN;
if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST)
val |= VID_MODE_TYPE_BURST;