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media: i2c: gc2093: update sensor driver
1. fix linear mode ae flicker issue. 2. add hdr mode exposure limit issue. 3. fix hdr mode highlighting pink issue. 4. add some debug info. Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com> Change-Id: I270501bfc382f6d811d4267469cc9406cf6e99c7
This commit is contained in:
Wang Panzhenzhuan
committed by
Tao Huang
Tao Huang
parent
a60e77777e
commit
8d3dc35ee7
@@ -6,6 +6,11 @@
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*
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* V0.0X01.0X00 first version.
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* V0.0X01.0X01 Add HDR support.
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* V0.0X01.0X02 update sensor driver
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* 1. fix linear mode ae flicker issue.
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* 2. add hdr mode exposure limit issue.
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* 3. fix hdr mode highlighting pink issue.
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* 4. add some debug info.
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*/
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#include <linux/clk.h>
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@@ -28,12 +33,12 @@
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#include <media/v4l2-fwnode.h>
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#include <media/v4l2-subdev.h>
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#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x01)
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#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x02)
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#define GC2093_NAME "gc2093"
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#define GC2093_MEDIA_BUS_FMT MEDIA_BUS_FMT_SRGGB10_1X10
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#define MIPI_FREQ_297M 297000000
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#define MIPI_FREQ_396M 396000000
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#define MIPI_FREQ_150M 150000000
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#define MIPI_FREQ_300M 300000000
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#define GC2093_XVCLK_FREQ 27000000
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@@ -45,6 +50,10 @@
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#define GC2093_REG_EXP_LONG_H 0x0003
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#define GC2093_REG_EXP_LONG_L 0x0004
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#define GC2093_REG_VB_H 0x0007
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#define GC2093_REG_VB_L 0x0008
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#define GC2093_MIRROR_FLIP_REG 0x0017
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#define MIRROR_MASK BIT(0)
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#define FLIP_MASK BIT(1)
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@@ -66,6 +75,7 @@
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#define GC2093_GAIN_MAX 0x2000
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#define GC2093_GAIN_STEP 1
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#define GC2093_GAIN_DEFAULT 64
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#define REG_NULL 0xFFFF
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#define GC2093_LANES 2
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@@ -88,8 +98,8 @@ enum {
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};
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enum {
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LINK_FREQ_297M_INDEX,
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LINK_FREQ_396M_INDEX,
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LINK_FREQ_150M_INDEX,
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LINK_FREQ_300M_INDEX,
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};
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struct gain_reg_config {
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@@ -144,6 +154,7 @@ struct gc2093 {
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const char *module_facing;
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const char *module_name;
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const char *len_name;
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u32 cur_vts;
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bool has_init_exp;
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struct preisp_hdrae_exp_s init_hdrae_exp;
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@@ -156,8 +167,8 @@ static const struct regmap_config gc2093_regmap_config = {
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};
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static const s64 link_freq_menu_items[] = {
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MIPI_FREQ_297M,
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MIPI_FREQ_396M,
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MIPI_FREQ_150M,
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MIPI_FREQ_300M,
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};
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/*
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@@ -216,20 +227,20 @@ static const struct reg_sequence gc2093_1080p_liner_settings[] = {
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{0x00c7, 0xe1},
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{0x001b, 0x73},
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{0x0028, 0x0d},
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{0x0029, 0x40},
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{0x0029, 0x24},
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{0x002b, 0x04},
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{0x002e, 0x23},
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{0x0037, 0x03},
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{0x0038, 0x88},
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{0x0044, 0x20},
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{0x004b, 0x14},
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{0x0055, 0x20},
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{0x0068, 0x20},
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{0x0069, 0x20},
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{0x0043, 0x04},
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{0x0044, 0x38},
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{0x004a, 0x01},
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{0x004b, 0x28},
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{0x0055, 0x38},
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{0x006b, 0x44},
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{0x0077, 0x00},
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{0x0078, 0x20},
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{0x007c, 0xa1},
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{0x00d3, 0xdc},
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{0x00d3, 0xd4},
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{0x00e6, 0x50},
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/* Gain */
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{0x00b6, 0xc0},
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@@ -237,18 +248,29 @@ static const struct reg_sequence gc2093_1080p_liner_settings[] = {
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/* Isp */
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{0x0102, 0x89},
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{0x0104, 0x01},
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{0x010f, 0x00},
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{0x0158, 0x00},
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{0x0123, 0x08},
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{0x0123, 0x00},
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{0x0120, 0x01},
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{0x0121, 0x00},
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{0x0122, 0x10},
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{0x0124, 0x03},
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{0x0125, 0xff},
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{0x0126, 0x3c},
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{0x001a, 0x8c},
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{0x00c6, 0xe0},
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/* Blk */
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{0x0026, 0x20},
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{0x0026, 0x30},
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{0x0142, 0x00},
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{0x0149, 0x1e},
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{0x014a, 0x07},
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{0x014b, 0x80},
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{0x0155, 0x07},
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{0x0414, 0x7e},
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{0x0415, 0x7e},
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{0x0416, 0x7e},
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{0x0417, 0x7e},
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{0x0155, 0x00},
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{0x0414, 0x78},
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{0x0415, 0x78},
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{0x0416, 0x78},
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{0x0417, 0x78},
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/* Window */
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{0x0192, 0x02},
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{0x0194, 0x03},
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@@ -409,7 +431,7 @@ static const struct gc2093_mode supported_modes[] = {
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.exp_def = 0x460,
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.hts_def = 0x898,
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.vts_def = 0x465,
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.link_freq_index = LINK_FREQ_297M_INDEX,
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.link_freq_index = LINK_FREQ_150M_INDEX,
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.reg_list = gc2093_1080p_liner_settings,
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.reg_num = ARRAY_SIZE(gc2093_1080p_liner_settings),
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.hdr_mode = NO_HDR,
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@@ -425,7 +447,7 @@ static const struct gc2093_mode supported_modes[] = {
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.exp_def = 0x460,
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.hts_def = 0xa50,
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.vts_def = 0x4e2,
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.link_freq_index = LINK_FREQ_396M_INDEX,
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.link_freq_index = LINK_FREQ_300M_INDEX,
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.reg_list = gc2093_1080p_hdr_settings,
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.reg_num = ARRAY_SIZE(gc2093_1080p_hdr_settings),
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.hdr_mode = HDR_X2,
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@@ -437,9 +459,10 @@ static const struct gc2093_mode supported_modes[] = {
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};
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/* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
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/* * 2, to match suitable isp freq */
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static u64 to_pixel_rate(u32 index)
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{
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u64 pixel_rate = link_freq_menu_items[index] * 2 * GC2093_LANES;
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u64 pixel_rate = link_freq_menu_items[index] * 2 * GC2093_LANES * 2;
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do_div(pixel_rate, 10);
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@@ -552,16 +575,19 @@ static int gc2093_set_ctrl(struct v4l2_ctrl *ctrl)
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switch (ctrl->id) {
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case V4L2_CID_EXPOSURE:
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dev_dbg(gc2093->dev, "set exposure value 0x%x\n", ctrl->val);
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ret = gc2093_write_reg(gc2093, GC2093_REG_EXP_LONG_H,
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(ctrl->val >> 8) & 0x3f);
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ret |= gc2093_write_reg(gc2093, GC2093_REG_EXP_LONG_L,
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ctrl->val & 0xff);
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break;
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case V4L2_CID_ANALOGUE_GAIN:
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dev_dbg(gc2093->dev, "set gain value 0x%x\n", ctrl->val);
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gc2093_set_gain(gc2093, ctrl->val);
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break;
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case V4L2_CID_VBLANK:
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/* The exposure goes up and reduces the frame rate, no need to write vb */
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dev_dbg(gc2093->dev, " set blank value 0x%x\n", ctrl->val);
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break;
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case V4L2_CID_HFLIP:
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regmap_update_bits(gc2093->regmap, GC2093_MIRROR_FLIP_REG,
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@@ -617,8 +643,8 @@ static int gc2093_initialize_controls(struct gc2093 *gc2093)
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link_freq_menu_items);
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gc2093->pixel_rate = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
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0, to_pixel_rate(LINK_FREQ_396M_INDEX),
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1, to_pixel_rate(LINK_FREQ_297M_INDEX));
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0, to_pixel_rate(LINK_FREQ_300M_INDEX),
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1, to_pixel_rate(LINK_FREQ_150M_INDEX));
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h_blank = mode->hts_def - mode->width;
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gc2093->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
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@@ -759,6 +785,8 @@ static long gc2093_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
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long ret = 0;
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u32 i, h, w;
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u32 stream = 0;
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u8 vb_h = 0, vb_l = 0;
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u16 vb = 0, cur_vts = 0, short_exp = 0, middle_exp = 0;
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switch (cmd) {
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case PREISP_CMD_SET_HDRAE_EXP:
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@@ -769,15 +797,65 @@ static long gc2093_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
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break;
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}
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dev_dbg(gc2093->dev, "%s short_gain_reg: 0x%x\n",
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__func__, hdrae_exp->short_gain_reg);
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ret = gc2093_set_gain(gc2093, hdrae_exp->short_gain_reg);
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if (ret) {
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dev_err(gc2093->dev, "Failed to set gain!)\n");
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return ret;
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}
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dev_dbg(gc2093->dev, "%s exp_reg middle: 0x%x, short: 0x%x\n",
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__func__, hdrae_exp->middle_exp_reg,
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hdrae_exp->short_exp_reg);
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// Optimize blooming effect
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if (hdrae_exp->middle_exp_reg < 0x30 || hdrae_exp->short_exp_reg < 4)
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gc2093_write_reg(gc2093, 0x0032, 0xfd);
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else
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gc2093_write_reg(gc2093, 0x0032, 0xf8);
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/* hdr exp limit
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* 1. max short_exp_reg < VB
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* 2. short_exp_reg + middle_exp_reg < framelength
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*/
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/* 30FPS sample */
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// if (hdrae_exp->middle_exp_reg > 1100)
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// hdrae_exp->middle_exp_reg = 1100;
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//
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// if (hdrae_exp->short_exp_reg > 68)
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// hdrae_exp->short_exp_reg = 68;
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ret = gc2093_read_reg(gc2093, GC2093_REG_VB_H, &vb_h);
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ret |= gc2093_read_reg(gc2093, GC2093_REG_VB_L, &vb_l);
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if (ret) {
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dev_err(gc2093->dev, "Failed to read vb data)\n");
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return ret;
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}
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vb = vb_h << 8 | vb_l;
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/* max short exposure limit to 3 ms */
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if (hdrae_exp->short_exp_reg <= (vb - 8))
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short_exp = hdrae_exp->short_exp_reg;
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else
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short_exp = vb - 8;
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cur_vts = gc2093->cur_vts;
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dev_info(gc2093->dev, "%s cur_vts: 0x%x\n", __func__, cur_vts);
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if (short_exp + hdrae_exp->middle_exp_reg > cur_vts)
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middle_exp = cur_vts - short_exp;
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else
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middle_exp = hdrae_exp->middle_exp_reg;
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dev_dbg(gc2093->dev, "%s cal exp_reg middle: 0x%x, short: 0x%x\n",
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__func__, middle_exp, short_exp);
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ret |= gc2093_write_reg(gc2093, GC2093_REG_EXP_LONG_H,
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(hdrae_exp->middle_exp_reg >> 8) & 0x3f);
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(middle_exp >> 8) & 0x3f);
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ret |= gc2093_write_reg(gc2093, GC2093_REG_EXP_LONG_L,
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hdrae_exp->middle_exp_reg & 0xff);
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middle_exp & 0xff);
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ret |= gc2093_write_reg(gc2093, GC2093_REG_EXP_SHORT_H,
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(hdrae_exp->short_exp_reg >> 8) & 0x3f);
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(short_exp >> 8) & 0x3f);
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ret |= gc2093_write_reg(gc2093, GC2093_REG_EXP_SHORT_L,
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hdrae_exp->short_exp_reg & 0xff);
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short_exp & 0xff);
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break;
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case RKMODULE_GET_HDR_CFG:
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hdr_cfg = (struct rkmodule_hdr_cfg *)arg;
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@@ -807,6 +885,7 @@ static long gc2093_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
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__v4l2_ctrl_modify_range(gc2093->vblank, h,
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GC2093_VTS_MAX - gc2093->cur_mode->height,
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1, h);
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gc2093->cur_vts = gc2093->cur_mode->vts_def;
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dev_info(gc2093->dev, "sensor mode: %d\n",
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gc2093->cur_mode->hdr_mode);
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}
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@@ -887,8 +966,11 @@ static long gc2093_compat_ioctl32(struct v4l2_subdev *sd,
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}
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ret = gc2093_ioctl(sd, cmd, inf);
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if (!ret)
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if (!ret) {
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ret = copy_to_user(up, inf, sizeof(*inf));
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if (ret)
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ret = -EFAULT;
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}
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kfree(inf);
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break;
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case RKMODULE_GET_HDR_CFG:
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@@ -899,8 +981,11 @@ static long gc2093_compat_ioctl32(struct v4l2_subdev *sd,
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}
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ret = gc2093_ioctl(sd, cmd, hdr);
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if (!ret)
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if (!ret) {
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ret = copy_to_user(up, hdr, sizeof(*hdr));
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if (ret)
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ret = -EFAULT;
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}
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kfree(hdr);
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break;
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case RKMODULE_SET_HDR_CFG:
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@@ -913,6 +998,8 @@ static long gc2093_compat_ioctl32(struct v4l2_subdev *sd,
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ret = copy_from_user(hdr, up, sizeof(*hdr));
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if (!ret)
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ret = gc2093_ioctl(sd, cmd, hdr);
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else
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ret = -EFAULT;
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kfree(hdr);
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break;
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case PREISP_CMD_SET_HDRAE_EXP:
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@@ -925,12 +1012,16 @@ static long gc2093_compat_ioctl32(struct v4l2_subdev *sd,
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ret = copy_from_user(hdrae, up, sizeof(*hdrae));
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if (!ret)
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ret = gc2093_ioctl(sd, cmd, hdrae);
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else
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ret = -EFAULT;
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kfree(hdrae);
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break;
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case RKMODULE_SET_QUICK_STREAM:
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ret = copy_from_user(&stream, up, sizeof(u32));
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if (!ret)
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ret = gc2093_ioctl(sd, cmd, &stream);
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else
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ret = -EFAULT;
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break;
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default:
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ret = -ENOIOCTLCMD;
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@@ -944,6 +1035,16 @@ static int gc2093_s_stream(struct v4l2_subdev *sd, int on)
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{
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struct gc2093 *gc2093 = to_gc2093(sd);
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int ret = 0;
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unsigned int fps;
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unsigned int delay_us;
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fps = DIV_ROUND_CLOSEST(gc2093->cur_mode->max_fps.denominator,
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gc2093->cur_mode->max_fps.numerator);
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dev_info(gc2093->dev, "%s: on: %d, %dx%d@%d\n", __func__, on,
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gc2093->cur_mode->width,
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gc2093->cur_mode->height,
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fps);
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mutex_lock(&gc2093->lock);
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on = !!on;
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@@ -965,6 +1066,12 @@ static int gc2093_s_stream(struct v4l2_subdev *sd, int on)
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}
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} else {
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__gc2093_stop_stream(gc2093);
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/* delay to enable oneframe complete */
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delay_us = 1000 * 1000 / fps;
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usleep_range(delay_us, delay_us+10);
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dev_info(gc2093->dev, "%s: on: %d, sleep(%dus)\n",
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__func__, on, delay_us);
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pm_runtime_put(gc2093->dev);
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}
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@@ -1295,6 +1402,7 @@ static int gc2093_probe(struct i2c_client *client,
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/* set default mode */
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gc2093->cur_mode = &supported_modes[0];
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gc2093->cfg_num = ARRAY_SIZE(supported_modes);
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gc2093->cur_vts = gc2093->cur_mode->vts_def;
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sd = &gc2093->subdev;
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v4l2_i2c_subdev_init(sd, client, &gc2093_subdev_ops);
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