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drm/rockchip: vop2: check xmirror/ymirror/rotate90/rotate270 for cluster

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1. Cluster can't support xmirror/rotate90/rotate270 when it isn't fbc
format.
2. Cluster can't support xmirror/ymirror/rotate90/rotate270 when it is
tiled format.

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I191c090d69177f13b0352a0df452fc050f66a74c
This commit is contained in:
Sandy Huang
2024-04-07 16:01:15 +08:00
committed by Tao Huang
parent c0abcaf26c
commit 8d62bc8475
2 changed files with 25 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

32
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
View File

@@ -5295,23 +5295,31 @@ static int vop2_plane_atomic_check(struct drm_plane *plane, struct drm_atomic_st
if (!vpstate->afbc_en &&
(fb->format->format == DRM_FORMAT_XRGB2101010 ||
fb->format->format == DRM_FORMAT_XBGR2101010)) {
DRM_ERROR("RK3588 unsupported linear XRGB2101010 at %s\n", win->name);
DRM_ERROR("Unsupported linear XRGB2101010 at %s\n", win->name);
return -EINVAL;
}
if (vop2_cluster_window(win) && !vpstate->afbc_en && fb->format->is_yuv) {
DRM_ERROR("Unsupported linear yuv format at %s\n", win->name);
return -EINVAL;
}
}
if (vp->vop2->version > VOP_VERSION_RK3568) {
if (vop2_cluster_window(win) && !vpstate->afbc_en && fb->format->is_yuv && !is_vop3(vop2)) {
DRM_ERROR("Unsupported linear yuv format at %s\n", win->name);
return -EINVAL;
}
/* Cluster can't support xmirror/rotate90/rotate270 when it isn't fbc format. */
if (vop2_cluster_window(win) && !vpstate->afbc_en &&
(pstate->rotation & (DRM_MODE_REFLECT_X | DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270))) {
DRM_ERROR("Unsupported linear rotation(%d) format at %s\n",
pstate->rotation, win->name);
return -EINVAL;
}
if (vop2_cluster_window(win) && !vpstate->afbc_en &&
(win->supported_rotations & pstate->rotation)) {
DRM_ERROR("Unsupported linear rotation(%d) format at %s\n",
pstate->rotation, win->name);
return -EINVAL;
}
/* Cluster can't support xmirror/ymirror/rotate90/rotate270 when it is tiled format. */
if (vop2_cluster_window(win) && vpstate->tiled_en &&
(pstate->rotation & (DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y |
DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270))) {
DRM_ERROR("Unsupported x/y mirror or rotation(%d) tiled format at %s\n",
pstate->rotation, win->name);
return -EINVAL;
}
if (win->feature & WIN_FEATURE_CLUSTER_SUB) {

5
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
View File

@@ -2861,6 +2861,7 @@ static const struct vop2_win_regs rk3528_cluster0_win_data = {
.y2r_en = VOP_REG(RK3568_CLUSTER0_WIN0_CTRL0, 0x1, 8),
.r2y_en = VOP_REG(RK3568_CLUSTER0_WIN0_CTRL0, 0x1, 9),
.csc_mode = VOP_REG(RK3568_CLUSTER0_WIN0_CTRL0, 0x7, 10),
.ymirror = VOP_REG(RK3568_CLUSTER0_WIN0_CTRL0, 0x1, 21),
.axi_yrgb_id = VOP_REG(RK3528_CLUSTER0_WIN0_CTRL2, 0x1f, 0),
.axi_uv_id = VOP_REG(RK3528_CLUSTER0_WIN0_CTRL2, 0x1f, 5),
};
@@ -2883,6 +2884,7 @@ static const struct vop2_win_regs rk3568_cluster0_win_data = {
.y2r_en = VOP_REG(RK3568_CLUSTER0_WIN0_CTRL0, 0x1, 8),
.r2y_en = VOP_REG(RK3568_CLUSTER0_WIN0_CTRL0, 0x1, 9),
.csc_mode = VOP_REG(RK3568_CLUSTER0_WIN0_CTRL0, 0x3, 10),
.ymirror = VOP_REG(RK3568_CLUSTER0_WIN0_CTRL0, 0x1, 21),
.axi_yrgb_id = VOP_REG(RK3568_CLUSTER0_WIN0_CTRL2, 0x1f, 0),
.axi_uv_id = VOP_REG(RK3568_CLUSTER0_WIN0_CTRL2, 0x1f, 5),
.axi_id = VOP_REG(RK3568_CLUSTER0_CTRL, 0x1, 13),
@@ -2906,6 +2908,7 @@ static const struct vop2_win_regs rk3568_cluster1_win_data = {
.y2r_en = VOP_REG(RK3568_CLUSTER1_WIN0_CTRL0, 0x1, 8),
.r2y_en = VOP_REG(RK3568_CLUSTER1_WIN0_CTRL0, 0x1, 9),
.csc_mode = VOP_REG(RK3568_CLUSTER1_WIN0_CTRL0, 0x3, 10),
.ymirror = VOP_REG(RK3568_CLUSTER1_WIN0_CTRL0, 0x1, 21),
.axi_yrgb_id = VOP_REG(RK3568_CLUSTER1_WIN0_CTRL2, 0x1f, 0),
.axi_uv_id = VOP_REG(RK3568_CLUSTER1_WIN0_CTRL2, 0x1f, 5),
.axi_id = VOP_REG(RK3568_CLUSTER1_CTRL, 0x1, 13),
@@ -3560,6 +3563,7 @@ static const struct vop2_win_regs rk3576_cluster0_win_data = {
.csc_mode = VOP_REG(RK3568_CLUSTER0_WIN0_CTRL0, 0x7, 10),
.axi_yrgb_id = VOP_REG(RK3528_CLUSTER0_WIN0_CTRL2, 0x1f, 0),
.axi_uv_id = VOP_REG(RK3528_CLUSTER0_WIN0_CTRL2, 0x1f, 5),
.ymirror = VOP_REG(RK3568_CLUSTER0_WIN0_CTRL0, 0x1, 21),
.csc_y2r_path_sel = VOP_REG(RK3568_CLUSTER0_WIN0_CTRL0, 0x1, 24),
};
@@ -3611,6 +3615,7 @@ static const struct vop2_win_regs rk3576_cluster1_win_data = {
.csc_mode = VOP_REG(RK3568_CLUSTER1_WIN0_CTRL0, 0x7, 10),
.axi_yrgb_id = VOP_REG(RK3568_CLUSTER1_WIN0_CTRL2, 0x1f, 0),
.axi_uv_id = VOP_REG(RK3568_CLUSTER1_WIN0_CTRL2, 0x1f, 5),
.ymirror = VOP_REG(RK3568_CLUSTER1_WIN0_CTRL0, 0x1, 21),
.csc_y2r_path_sel = VOP_REG(RK3568_CLUSTER1_WIN0_CTRL0, 0x1, 24),
};