arm64: dts: rockchip: rk3588: remove pclk_gpu

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I68c453689207b3e25ffcaf91920afce7994c6ce6
This commit is contained in:
Elaine Zhang
2021-12-21 11:35:09 +08:00
committed by Tao Huang
parent 757826e997
commit 8e0cd59532

View File

@@ -1022,8 +1022,8 @@
gpu_opp_table: gpu-opp-table {
compatible = "operating-points-v2";
clocks = <&cru CLK_GPU>, <&cru PCLK_GPU_GRF>;
clock-names = "clk", "pclk";
clocks = <&cru CLK_GPU>;
clock-names = "clk";
rockchip,grf = <&gpu_grf>;
volt-mem-read-margin = <
855000 1
@@ -1578,8 +1578,7 @@
/* These power domains are grouped by VD_GPU */
power-domain@RK3588_PD_GPU {
reg = <RK3588_PD_GPU>;
clocks = <&cru PCLK_GPU_ROOT>,
<&cru CLK_GPU>,
clocks = <&cru CLK_GPU>,
<&cru CLK_GPU_COREGROUP>,
<&cru CLK_GPU_STACKS>;
pm_qos = <&qos_gpu_m0>,
@@ -1885,8 +1884,8 @@
#size-cells = <0>;
pvtm@4 {
reg = <4>;
clocks = <&cru CLK_GPU_PVTM>, <&cru PCLK_GPU_PVTM>;
clock-names = "clk", "pclk";
clocks = <&cru CLK_GPU_PVTM>;
clock-names = "clk";
resets = <&cru SRST_GPU_PVTM>, <&cru SRST_P_GPU_PVTM>;
reset-names = "rts", "rst-p";
};