phy: rockchip: inno-usb2: support usb wakeup for rk3506

1. Support linestate filter time control register for OTG0 and OTG1.
2. Disable disconnect rise and disconnect fall irq. Because these
two interrupts will be triggered immediately after the system goes
into sleep mode, causing the system to be unable to sleep.

Change-Id: Ia6c1e58ef926f86dee6df0013aafe9bfe4586b52
Signed-off-by: Jianwei Zheng <jianwei.zheng@rock-chips.com>
This commit is contained in:
Jianwei Zheng
2024-11-15 16:37:45 +08:00
committed by Tao Huang
parent b5c70abd65
commit 8e6926b1d4

View File

@@ -4006,10 +4006,10 @@ static const struct rockchip_usb2phy_cfg rk3506_phy_cfgs[] = {
.ls_det_en = { 0x0150, 0, 0, 0, 1 },
.ls_det_st = { 0x0154, 0, 0, 0, 1 },
.ls_det_clr = { 0x0158, 0, 0, 0, 1 },
.disfall_en = { 0x0150, 7, 7, 0, 1 },
.disfall_en = { 0x0150, 7, 7, 0, 0 },
.disfall_st = { 0x0154, 7, 7, 0, 1 },
.disfall_clr = { 0x0158, 7, 7, 0, 1 },
.disrise_en = { 0x0150, 6, 6, 0, 1 },
.disrise_en = { 0x0150, 6, 6, 0, 0 },
.disrise_st = { 0x0154, 6, 6, 0, 1 },
.disrise_clr = { 0x0158, 6, 6, 0, 1 },
.utmi_avalid = { 0x0118, 1, 1, 0, 1 },
@@ -4018,6 +4018,7 @@ static const struct rockchip_usb2phy_cfg rk3506_phy_cfgs[] = {
.utmi_ls = { 0x0118, 5, 4, 0, 1 },
.utmi_hstdet = { 0x0118, 7, 7, 0, 1 },
.vbus_det_en = { 0x003c, 15, 15, 1, 0 },
.port_ls_filter_con = { 0x0160, 19, 0, 0x30100, 0x20 },
},
[USB2PHY_PORT_HOST] = {
.phy_sus = { 0x0070, 8, 0, 0, 0x1d1 },
@@ -4037,10 +4038,10 @@ static const struct rockchip_usb2phy_cfg rk3506_phy_cfgs[] = {
.ls_det_en = { 0x0170, 0, 0, 0, 1 },
.ls_det_st = { 0x0174, 0, 0, 0, 1 },
.ls_det_clr = { 0x0178, 0, 0, 0, 1 },
.disfall_en = { 0x0170, 7, 7, 0, 1 },
.disfall_en = { 0x0170, 7, 7, 0, 0 },
.disfall_st = { 0x0174, 7, 7, 0, 1 },
.disfall_clr = { 0x0178, 7, 7, 0, 1 },
.disrise_en = { 0x0170, 6, 6, 0, 1 },
.disrise_en = { 0x0170, 6, 6, 0, 0 },
.disrise_st = { 0x0174, 6, 6, 0, 1 },
.disrise_clr = { 0x0178, 6, 6, 0, 1 },
.utmi_avalid = { 0x0118, 9, 9, 0, 1 },
@@ -4049,6 +4050,7 @@ static const struct rockchip_usb2phy_cfg rk3506_phy_cfgs[] = {
.utmi_ls = { 0x0118, 13, 12, 0, 1 },
.utmi_hstdet = { 0x0118, 15, 15, 0, 1 },
.vbus_det_en = { 0x043c, 15, 15, 1, 0 },
.port_ls_filter_con = { 0x0180, 19, 0, 0x30100, 0x20 },
}
},
.chg_det = {