arm64: dts: rockchip: Fix the gmac pin definition for rk3568

Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I8ada5b5d548632f45e4d8106c440b97afd1fc056
This commit is contained in:
David Wu
2020-10-22 16:53:26 +08:00
committed by Tao Huang
parent 4b8a410e90
commit 90c3d40cb7

View File

@@ -412,7 +412,7 @@
};
eth0 {
/omit-if-no-ref/
eth0_pins: eth0-pins {
eth0_clkout_pins: eth0-clkout-pins {
rockchip,pins =
/* eth0_refclko25m */
<2 RK_PC1 2 &pcfg_pull_none>;
@@ -420,13 +420,13 @@
};
eth1 {
/omit-if-no-ref/
eth1m0_pins: eth1m0-pins {
eth1m0_clkout_pins: eth1m0-clkout-pins {
rockchip,pins =
/* eth1_refclko25mm0 */
<3 RK_PB0 3 &pcfg_pull_none>;
};
/omit-if-no-ref/
eth1m1_pins: eth1m1-pins {
eth1m1_clkout_pins: eth1m1-clkout-pins {
rockchip,pins =
/* eth1_refclko25mm1 */
<4 RK_PB3 3 &pcfg_pull_none>;
@@ -500,14 +500,36 @@
};
gmac0 {
/omit-if-no-ref/
gmac0_pins: gmac0-pins {
gmac0_miim_pins: gmac0-miim-pins {
rockchip,pins =
/* gmac0_mclkinout */
<2 RK_PC2 2 &pcfg_pull_none>,
/* gmac0_mdc */
<2 RK_PC3 2 &pcfg_pull_none>,
/* gmac0_mdio */
<2 RK_PC4 2 &pcfg_pull_none>,
<2 RK_PC4 2 &pcfg_pull_none>;
};
/omit-if-no-ref/
gmac0_rmii_pins: gmac0-rmii-pins {
rockchip,pins =
/* gmac0_mclkinout */
<2 RK_PC2 2 &pcfg_pull_none>,
/* gmac0_rxd0 */
<2 RK_PB6 1 &pcfg_pull_none>,
/* gmac0_rxd1 */
<2 RK_PB7 2 &pcfg_pull_none>,
/* gmac0_rxdvcrs */
<2 RK_PC0 2 &pcfg_pull_none>,
/* gmac0_rxer */
<2 RK_PC5 2 &pcfg_pull_none>,
/* gmac0_txd0 */
<2 RK_PB3 1 &pcfg_pull_none>,
/* gmac0_txd1 */
<2 RK_PB4 1 &pcfg_pull_none>,
/* gmac0_txen */
<2 RK_PB5 1 &pcfg_pull_none>;
};
/omit-if-no-ref/
gmac0_rgmii_pins: gmac0-rgmii-pins {
rockchip,pins =
/* gmac0_rxclk */
<2 RK_PA5 2 &pcfg_pull_none>,
/* gmac0_rxd0 */
@@ -520,8 +542,6 @@
<2 RK_PA4 2 &pcfg_pull_none>,
/* gmac0_rxdvcrs */
<2 RK_PC0 2 &pcfg_pull_none>,
/* gmac0_rxer */
<2 RK_PC5 2 &pcfg_pull_none>,
/* gmac0_txclk */
<2 RK_PB0 2 &pcfg_pull_none>,
/* gmac0_txd0 */
@@ -538,14 +558,36 @@
};
gmac1 {
/omit-if-no-ref/
gmac1m0_pins: gmac1m0-pins {
gmac1m0_miim_pins: gmac1m0-miim-pins {
rockchip,pins =
/* gmac1_mclkinoutm0 */
<3 RK_PC0 3 &pcfg_pull_none>,
/* gmac1_mdcm0 */
<3 RK_PC4 3 &pcfg_pull_none>,
/* gmac1_mdiom0 */
<3 RK_PC5 3 &pcfg_pull_none>,
<3 RK_PC5 3 &pcfg_pull_none>;
};
/omit-if-no-ref/
gmac1m0_rmii_pins: gmac1m0-rmii-pins {
rockchip,pins =
/* gmac1_mclkinoutm0 */
<3 RK_PC0 3 &pcfg_pull_none>,
/* gmac1_rxd0m0 */
<3 RK_PB1 3 &pcfg_pull_none>,
/* gmac1_rxd1m0 */
<3 RK_PB2 3 &pcfg_pull_none>,
/* gmac1_rxdvcrsm0 */
<3 RK_PB3 3 &pcfg_pull_none>,
/* gmac1_rxerm0 */
<3 RK_PB4 3 &pcfg_pull_none>,
/* gmac1_txd0m0 */
<3 RK_PB5 3 &pcfg_pull_none>,
/* gmac1_txd1m0 */
<3 RK_PB6 3 &pcfg_pull_none>,
/* gmac1_txenm0 */
<3 RK_PB7 3 &pcfg_pull_none>;
};
/omit-if-no-ref/
gmac1m0_rgmii_pins: gmac1m0-rgmii-pins {
rockchip,pins =
/* gmac1_rxclkm0 */
<3 RK_PA7 3 &pcfg_pull_none>,
/* gmac1_rxd0m0 */
@@ -558,8 +600,6 @@
<3 RK_PA5 3 &pcfg_pull_none>,
/* gmac1_rxdvcrsm0 */
<3 RK_PB3 3 &pcfg_pull_none>,
/* gmac1_rxerm0 */
<3 RK_PB4 3 &pcfg_pull_none>,
/* gmac1_txclkm0 */
<3 RK_PA6 3 &pcfg_pull_none>,
/* gmac1_txd0m0 */
@@ -574,14 +614,36 @@
<3 RK_PB7 3 &pcfg_pull_none>;
};
/omit-if-no-ref/
gmac1m1_pins: gmac1m1-pins {
gmac1m1_miim_pins: gmac1m1-miim-pins {
rockchip,pins =
/* gmac1_mclkinoutm1 */
<4 RK_PC1 3 &pcfg_pull_none>,
/* gmac1_mdcm1 */
<4 RK_PB6 3 &pcfg_pull_none>,
/* gmac1_mdiom1 */
<4 RK_PB7 3 &pcfg_pull_none>,
<4 RK_PB7 3 &pcfg_pull_none>;
};
/omit-if-no-ref/
gmac1m1_rmii_pins: gmac1m1-rmii-pins {
rockchip,pins =
/* gmac1_mclkinoutm1 */
<4 RK_PC1 3 &pcfg_pull_none>,
/* gmac1_rxd0m1 */
<4 RK_PA7 3 &pcfg_pull_none>,
/* gmac1_rxd1m1 */
<4 RK_PB0 3 &pcfg_pull_none>,
/* gmac1_rxdvcrsm1 */
<4 RK_PB1 3 &pcfg_pull_none>,
/* gmac1_rxerm1 */
<4 RK_PB2 3 &pcfg_pull_none>,
/* gmac1_txd0m1 */
<4 RK_PA4 3 &pcfg_pull_none>,
/* gmac1_txd1m1 */
<4 RK_PA5 3 &pcfg_pull_none>,
/* gmac1_txenm1 */
<4 RK_PA6 3 &pcfg_pull_none>;
};
/omit-if-no-ref/
gmac1m1_rgmii_pins: gmac1m1-rgmii-pins {
rockchip,pins =
/* gmac1_rxclkm1 */
<4 RK_PA3 3 &pcfg_pull_none>,
/* gmac1_rxd0m1 */
@@ -594,8 +656,6 @@
<4 RK_PA2 3 &pcfg_pull_none>,
/* gmac1_rxdvcrsm1 */
<4 RK_PB1 3 &pcfg_pull_none>,
/* gmac1_rxerm1 */
<4 RK_PB2 3 &pcfg_pull_none>,
/* gmac1_txclkm1 */
<4 RK_PA0 3 &pcfg_pull_none>,
/* gmac1_txd0m1 */