ARM64: dts: rk3399: move opp tables to rk3399-opp.dtsi

Add a new dtsi file - rk3399-opp.dtsi, to configure opp-tables
for cpu, gpu and dmc.

Add rk3399-early-opp.dtsi for board with ES1, which need limit
frequency for cpu, gpu and dmc.

Change-Id: Ib57761fd5f405b0e79039d7a01e6e023d6f5dc2c
Reviewed-by: Finley Xiao <finley.xiao@rock-chips.com>
Reviewed-by: Huang, Tao <huangtao@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
This commit is contained in:
Jianqun Xu
2016-11-16 15:22:37 +08:00
committed by Huang, Tao
parent aba4c4996d
commit 910f9d73a1
14 changed files with 476 additions and 1819 deletions

View File

@@ -43,6 +43,7 @@
#include <dt-bindings/input/input.h>
#include "rk3399.dtsi"
#include "rk3399-android.dtsi"
#include "rk3399-opp.dtsi"
/ {
compatible = "rockchip,rk3399-box","rockchip,rk3399";
@@ -281,191 +282,6 @@
#sound-dai-cells = <0>;
};
&cluster0_opp {
opp@408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <875000>;
clock-latency-ns = <40000>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <925000>;
clock-latency-ns = <40000>;
};
opp@1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1050000>;
clock-latency-ns = <40000>;
};
opp@1512000000 {
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt = <1125000>;
clock-latency-ns = <40000>;
};
};
&cluster1_opp {
opp@408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <825000>;
clock-latency-ns = <40000>;
};
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <875000>;
clock-latency-ns = <40000>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <950000>;
clock-latency-ns = <40000>;
};
opp@1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1025000>;
clock-latency-ns = <40000>;
};
opp@1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1100000>;
clock-latency-ns = <40000>;
};
opp@1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1175000>;
clock-latency-ns = <40000>;
};
opp@1992000000 {
opp-hz = /bits/ 64 <1992000000>;
opp-microvolt = <1250000>;
clock-latency-ns = <40000>;
};
};
&CPU_COST_A72 {
busy-cost-data = <
210 129 /* 408MHz */
308 184 /* 600MHz */
419 246 /* 816MHz */
518 335 /* 1008MHz */
617 428 /* 1200MHz */
728 573 /* 1416MHz */
827 724 /* 1608MHz */
925 900 /* 1800MHz */
1024 1108 /* 1992MHz */
>;
idle-cost-data = <
15
15
0
>;
};
&CPU_COST_A53 {
busy-cost-data = <
108 46 /* 408M */
159 67 /* 600M */
216 90 /* 816M */
267 120 /* 1008M */
318 153 /* 1200M */
375 198 /* 1416M */
401 222 /* 1512M */
>;
idle-cost-data = <
6
6
0
>;
};
&CLUSTER_COST_A72 {
busy-cost-data = <
210 129 /* 408MHz */
308 184 /* 600MHz */
419 246 /* 816MHz */
518 335 /* 1008MHz */
617 428 /* 1200MHz */
728 573 /* 1416MHz */
827 724 /* 1608MHz */
925 900 /* 1800MHz */
1024 1108 /* 1992MHz */
>;
idle-cost-data = <
65
65
65
>;
};
&CLUSTER_COST_A53 {
busy-cost-data = <
108 46 /* 408M */
159 67 /* 600M */
216 90 /* 816M */
267 120 /* 1008M */
318 153 /* 1200M */
375 198 /* 1416M */
401 222 /* 1512M */
>;
idle-cost-data = <
56
56
56
>;
};
&gpu_opp_table {
opp@200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <800000>;
};
opp@300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <800000>;
};
opp@400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <800000>;
};
opp@500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <900000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <900000>;
};
opp@800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1000000>;
};
};
&i2c0 {
status = "okay";
i2c-scl-rising-time-ns = <168>;

View File

@@ -0,0 +1,127 @@
/*
* Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/*
* NOTE: this file exists for the sake of early (pre-ES2) silicon. ES2 silicon
* will have different power characteristics.
*/
/ {
/delete-node/ opp-table0;
/delete-node/ opp-table1;
/delete-node/ opp-table2;
cluster0_opp: opp-table0 {
compatible = "operating-points-v2";
opp-shared;
opp00 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <900000>;
clock-latency-ns = <40000>;
};
opp01 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <900000>;
};
opp02 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <900000>;
};
opp03 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <900000>;
};
opp04 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <950000>;
};
opp05 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1050000>;
};
};
cluster1_opp: opp-table1 {
compatible = "operating-points-v2";
opp-shared;
opp00 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <900000>;
clock-latency-ns = <40000>;
};
opp01 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <900000>;
};
opp02 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <900000>;
};
opp03 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <950000>;
};
opp04 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <100000>;
};
};
gpu_opp_table: opp-table2 {
compatible = "operating-points-v2";
opp00 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <900000>;
};
opp01 {
opp-hz = /bits/ 64 <297000000>;
opp-microvolt = <900000>;
};
opp02 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <900000>;
};
};
};

View File

@@ -41,6 +41,7 @@
*/
#include "rk3399-evb.dtsi"
#include "rk3399-early-opp.dtsi"
/ {
compatible = "rockchip,rk3399-evb-rev1", "rockchip,rk3399";

View File

@@ -41,6 +41,7 @@
*/
#include "rk3399-evb.dtsi"
#include "rk3399-early-opp.dtsi"
/ {
compatible = "rockchip,rk3399-evb-rev2", "rockchip,rk3399";
@@ -75,164 +76,6 @@
dynamic-power-coefficient = <1068>;
};
&cluster0_opp {
opp@408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <875000>;
clock-latency-ns = <40000>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <925000>;
clock-latency-ns = <40000>;
status = "disabeld";
};
opp@1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1050000>;
clock-latency-ns = <40000>;
status = "disabeld";
};
opp@1512000000 {
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt = <1075000>;
clock-latency-ns = <40000>;
status = "disabeld";
};
};
&cluster1_opp {
opp@408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <825000>;
clock-latency-ns = <40000>;
};
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <875000>;
clock-latency-ns = <40000>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <950000>;
clock-latency-ns = <40000>;
status = "disabeld";
};
opp@1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1025000>;
clock-latency-ns = <40000>;
status = "disabeld";
};
opp@1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1125000>;
clock-latency-ns = <40000>;
status = "disabeld";
};
opp@1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1200000>;
clock-latency-ns = <40000>;
status = "disabeld";
};
};
&CPU_COST_A72 {
busy-cost-data = <
232 349 /* 408MHz */
341 547 /* 600MHz */
464 794 /* 816MHz */
573 1141 /* 1008MHz */
// 683 1850 /* 1200MHz */
// 805 2499 /* 1416MHz */
// 915 2922 /* 1608MHz */
// 1024 3416 /* 1800MHz */
>;
idle-cost-data = <
15
15
0
>;
};
&CPU_COST_A53 {
busy-cost-data = <
121 40 /* 408M */
179 62 /* 600M */
243 90 /* 816M */
300 126 /* 1008M */
// 357 196 /* 1200M */
// 421 246 /* 1416M */
// 449 263 /* 1512M */
>;
idle-cost-data = <
6
6
0
>;
};
&CLUSTER_COST_A72 {
busy-cost-data = <
232 349 /* 408MHz */
341 547 /* 600MHz */
464 794 /* 816MHz */
573 1141 /* 1008MHz */
// 683 1850 /* 1200MHz */
// 805 2499 /* 1416MHz */
// 915 2922 /* 1608MHz */
// 1024 3416 /* 1800MHz */
>;
idle-cost-data = <
65
65
65
>;
};
&CLUSTER_COST_A53 {
busy-cost-data = <
121 40 /* 408M */
179 62 /* 600M */
243 90 /* 816M */
300 126 /* 1008M */
// 357 196 /* 1200M */
// 421 246 /* 1416M */
// 449 263 /* 1512M */
>;
idle-cost-data = <
56
56
56
>;
};
&soc_thermal {
sustainable-power = <1600>; /* milliwatts */

View File

@@ -67,191 +67,6 @@
};
};
&cluster0_opp {
opp@408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <850000>;
clock-latency-ns = <40000>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <925000>;
clock-latency-ns = <40000>;
};
opp@1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1050000>;
clock-latency-ns = <40000>;
};
opp@1512000000 {
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt = <1100000>;
clock-latency-ns = <40000>;
};
};
&cluster1_opp {
opp@408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <825000>;
clock-latency-ns = <40000>;
};
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <850000>;
clock-latency-ns = <40000>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <900000>;
clock-latency-ns = <40000>;
};
opp@1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <40000>;
};
opp@1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1050000>;
clock-latency-ns = <40000>;
};
opp@1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1150000>;
clock-latency-ns = <40000>;
};
opp@1992000000 {
opp-hz = /bits/ 64 <1992000000>;
opp-microvolt = <1225000>;
clock-latency-ns = <40000>;
};
};
&CPU_COST_A72 {
busy-cost-data = <
210 129 /* 408MHz */
308 184 /* 600MHz */
419 246 /* 816MHz */
518 335 /* 1008MHz */
617 428 /* 1200MHz */
728 573 /* 1416MHz */
827 724 /* 1608MHz */
925 900 /* 1800MHz */
1024 1108 /* 1992MHz */
>;
idle-cost-data = <
15
15
0
>;
};
&CPU_COST_A53 {
busy-cost-data = <
108 46 /* 408M */
159 67 /* 600M */
216 90 /* 816M */
267 120 /* 1008M */
318 153 /* 1200M */
375 198 /* 1416M */
401 222 /* 1512M */
>;
idle-cost-data = <
6
6
0
>;
};
&CLUSTER_COST_A72 {
busy-cost-data = <
210 129 /* 408MHz */
308 184 /* 600MHz */
419 246 /* 816MHz */
518 335 /* 1008MHz */
617 428 /* 1200MHz */
728 573 /* 1416MHz */
827 724 /* 1608MHz */
925 900 /* 1800MHz */
1024 1108 /* 1992MHz */
>;
idle-cost-data = <
65
65
65
>;
};
&CLUSTER_COST_A53 {
busy-cost-data = <
108 46 /* 408M */
159 67 /* 600M */
216 90 /* 816M */
267 120 /* 1008M */
318 153 /* 1200M */
375 198 /* 1416M */
401 222 /* 1512M */
>;
idle-cost-data = <
56
56
56
>;
};
&gpu_opp_table {
opp@200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <800000>;
};
opp@300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <800000>;
};
opp@400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <800000>;
};
opp@500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <825000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <900000>;
};
opp@800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1050000>;
};
};
&i2c0 {
fusb1: fusb30x@22 {
compatible = "fairchild,fusb302";

View File

@@ -42,6 +42,7 @@
#include <dt-bindings/pwm/pwm.h>
#include "rk3399.dtsi"
#include "rk3399-opp.dtsi"
/ {
compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
@@ -320,38 +321,6 @@
downdifferential = <40>;
};
&dmc_opp_table {
opp00 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <900000>;
};
opp01 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <900000>;
};
opp02 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <900000>;
};
opp03 {
opp-hz = /bits/ 64 <528000000>;
opp-microvolt = <900000>;
};
opp04 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <900000>;
};
opp05 {
opp-hz = /bits/ 64 <666000000>;
opp-microvolt = <900000>;
opp-suspend;
};
opp06 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <900000>;
};
};
&sdhci {
bus-width = <8>;
mmc-hs400-1_8v;

View File

@@ -44,6 +44,7 @@
#include "rk3399.dtsi"
#include "rk3399-android-next.dtsi"
#include "rk3399-opp.dtsi"
#include <dt-bindings/sensor-dev.h>
#include <dt-bindings/pwm/pwm.h>
@@ -273,229 +274,6 @@
};
};
&dfi {
status = "okay";
};
&dmc {
status = "disabled";
center-supply = <&vdd_center>;
upthreshold = <38>;
downdifferential = <20>;
};
&dmc_opp_table {
opp@300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <900000>;
};
opp@400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <900000>;
};
opp@528000000 {
opp-hz = /bits/ 64 <528000000>;
opp-microvolt = <900000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <900000>;
};
opp@666000000 {
opp-hz = /bits/ 64 <666000000>;
opp-microvolt = <900000>;
opp-suspend;
};
};
&cluster0_opp {
opp@408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <875000>;
clock-latency-ns = <40000>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <925000>;
clock-latency-ns = <40000>;
};
opp@1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1050000>;
clock-latency-ns = <40000>;
};
opp@1512000000 {
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt = <1100000>;
clock-latency-ns = <40000>;
status="disabled";
};
};
&cluster1_opp {
opp@408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <825000>;
clock-latency-ns = <40000>;
};
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <875000>;
clock-latency-ns = <40000>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <950000>;
clock-latency-ns = <40000>;
};
opp@1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1025000>;
clock-latency-ns = <40000>;
};
opp@1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1100000>;
clock-latency-ns = <40000>;
};
opp@1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1175000>;
clock-latency-ns = <40000>;
};
opp@1992000000 {
opp-hz = /bits/ 64 <1992000000>;
opp-microvolt = <1250000>;
clock-latency-ns = <40000>;
};
};
&CPU_COST_A72 {
busy-cost-data = <
210 129 /* 408MHz */
308 184 /* 600MHz */
419 246 /* 816MHz */
518 335 /* 1008MHz */
617 428 /* 1200MHz */
728 573 /* 1416MHz */
827 724 /* 1608MHz */
925 900 /* 1800MHz */
1024 1108 /* 1992MHz */
>;
idle-cost-data = <
15
15
0
>;
};
&CPU_COST_A53 {
busy-cost-data = <
108 46 /* 408M */
159 67 /* 600M */
216 90 /* 816M */
267 120 /* 1008M */
318 153 /* 1200M */
375 198 /* 1416M */
401 222 /* 1512M */
>;
idle-cost-data = <
6
6
0
>;
};
&CLUSTER_COST_A72 {
busy-cost-data = <
210 129 /* 408MHz */
308 184 /* 600MHz */
419 246 /* 816MHz */
518 335 /* 1008MHz */
617 428 /* 1200MHz */
728 573 /* 1416MHz */
827 724 /* 1608MHz */
925 900 /* 1800MHz */
1024 1108 /* 1992MHz */
>;
idle-cost-data = <
65
65
65
>;
};
&CLUSTER_COST_A53 {
busy-cost-data = <
108 46 /* 408M */
159 67 /* 600M */
216 90 /* 816M */
267 120 /* 1008M */
318 153 /* 1200M */
375 198 /* 1416M */
401 222 /* 1512M */
>;
idle-cost-data = <
56
56
56
>;
};
&gpu_opp_table {
compatible = "operating-points-v2";
opp-shared;
opp@200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <825000>;
};
opp@300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <850000>;
};
opp@400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <875000>;
};
opp@500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <950000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1025000>;
};
opp@800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1125000>;
};
};
&rk_key {
compatible = "rockchip,key";
status = "okay";

View File

@@ -44,6 +44,7 @@
#include "rk3399.dtsi"
#include "rk3399-android.dtsi"
#include "rk3399-opp.dtsi"
#include <dt-bindings/sensor-dev.h>
#include <dt-bindings/pwm/pwm.h>
@@ -261,229 +262,6 @@
};
};
&dfi {
status = "okay";
};
&dmc {
status = "okay";
center-supply = <&vdd_center>;
upthreshold = <38>;
downdifferential = <20>;
};
&dmc_opp_table {
opp@300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <900000>;
};
opp@400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <900000>;
};
opp@528000000 {
opp-hz = /bits/ 64 <528000000>;
opp-microvolt = <900000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <900000>;
};
opp@666000000 {
opp-hz = /bits/ 64 <666000000>;
opp-microvolt = <900000>;
opp-suspend;
};
};
&cluster0_opp {
opp@408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <875000>;
clock-latency-ns = <40000>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <925000>;
clock-latency-ns = <40000>;
};
opp@1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1050000>;
clock-latency-ns = <40000>;
};
opp@1512000000 {
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt = <1100000>;
clock-latency-ns = <40000>;
status="disabled";
};
};
&cluster1_opp {
opp@408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <825000>;
clock-latency-ns = <40000>;
};
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <875000>;
clock-latency-ns = <40000>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <950000>;
clock-latency-ns = <40000>;
};
opp@1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1025000>;
clock-latency-ns = <40000>;
};
opp@1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1100000>;
clock-latency-ns = <40000>;
};
opp@1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1175000>;
clock-latency-ns = <40000>;
};
opp@1992000000 {
opp-hz = /bits/ 64 <1992000000>;
opp-microvolt = <1250000>;
clock-latency-ns = <40000>;
};
};
&CPU_COST_A72 {
busy-cost-data = <
210 129 /* 408MHz */
308 184 /* 600MHz */
419 246 /* 816MHz */
518 335 /* 1008MHz */
617 428 /* 1200MHz */
728 573 /* 1416MHz */
827 724 /* 1608MHz */
925 900 /* 1800MHz */
1024 1108 /* 1992MHz */
>;
idle-cost-data = <
15
15
0
>;
};
&CPU_COST_A53 {
busy-cost-data = <
108 46 /* 408M */
159 67 /* 600M */
216 90 /* 816M */
267 120 /* 1008M */
318 153 /* 1200M */
375 198 /* 1416M */
401 222 /* 1512M */
>;
idle-cost-data = <
6
6
0
>;
};
&CLUSTER_COST_A72 {
busy-cost-data = <
210 129 /* 408MHz */
308 184 /* 600MHz */
419 246 /* 816MHz */
518 335 /* 1008MHz */
617 428 /* 1200MHz */
728 573 /* 1416MHz */
827 724 /* 1608MHz */
925 900 /* 1800MHz */
1024 1108 /* 1992MHz */
>;
idle-cost-data = <
65
65
65
>;
};
&CLUSTER_COST_A53 {
busy-cost-data = <
108 46 /* 408M */
159 67 /* 600M */
216 90 /* 816M */
267 120 /* 1008M */
318 153 /* 1200M */
375 198 /* 1416M */
401 222 /* 1512M */
>;
idle-cost-data = <
56
56
56
>;
};
&gpu_opp_table {
compatible = "operating-points-v2";
opp-shared;
opp@200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <825000>;
};
opp@300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <850000>;
};
opp@400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <875000>;
};
opp@500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <950000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1025000>;
};
opp@800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1125000>;
};
};
&rk_key {
compatible = "rockchip,key";
status = "okay";

View File

@@ -0,0 +1,229 @@
/*
* Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "rk3399-sched-energy.dtsi"
/ {
cluster0_opp: opp-table0 {
compatible = "operating-points-v2";
opp-shared;
opp00 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp01 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp02 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp03 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <850000>;
clock-latency-ns = <40000>;
};
opp04 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <925000>;
clock-latency-ns = <40000>;
};
opp05 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1050000>;
clock-latency-ns = <40000>;
};
opp06 {
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt = <1125000>;
clock-latency-ns = <40000>;
};
};
cluster1_opp: opp-table1 {
compatible = "operating-points-v2";
opp-shared;
opp00 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp01 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp02 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <825000>;
clock-latency-ns = <40000>;
};
opp03 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <850000>;
clock-latency-ns = <40000>;
};
opp04 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <900000>;
clock-latency-ns = <40000>;
};
opp05 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <40000>;
};
opp06 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1050000>;
clock-latency-ns = <40000>;
};
opp07 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1150000>;
clock-latency-ns = <40000>;
};
opp08 {
opp-hz = /bits/ 64 <1992000000>;
opp-microvolt = <1225000>;
clock-latency-ns = <40000>;
};
};
gpu_opp_table: opp-table2 {
compatible = "operating-points-v2";
opp00 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <800000>;
};
opp01 {
opp-hz = /bits/ 64 <297000000>;
opp-microvolt = <800000>;
};
opp02 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <800000>;
};
opp03 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <825000>;
};
opp04 {
opp-hz = /bits/ 64 <594000000>;
opp-microvolt = <900000>;
};
opp05 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1050000>;
};
};
dmc_opp_table: opp-table3 {
compatible = "operating-points-v2";
opp00 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <825000>;
};
opp01 {
opp-hz = /bits/ 64 <297000000>;
opp-microvolt = <850000>;
};
opp02 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <850000>;
};
opp03 {
opp-hz = /bits/ 64 <594000000>;
opp-microvolt = <900000>;
};
opp04 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <900000>;
};
};
};
&cpu_l0 {
operating-points-v2 = <&cluster0_opp>;
sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
};
&cpu_l1 {
operating-points-v2 = <&cluster0_opp>;
sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
};
&cpu_l2 {
operating-points-v2 = <&cluster0_opp>;
sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
};
&cpu_l3 {
operating-points-v2 = <&cluster0_opp>;
sched-energy-costs = <&RK3399_CPU_COST_0 &RK3399_CLUSTER_COST_0>;
};
&cpu_b0 {
operating-points-v2 = <&cluster1_opp>;
sched-energy-costs = <&RK3399_CPU_COST_1 &RK3399_CLUSTER_COST_1>;
};
&cpu_b1 {
operating-points-v2 = <&cluster1_opp>;
sched-energy-costs = <&RK3399_CPU_COST_1 &RK3399_CLUSTER_COST_1>;
};
&gpu {
operating-points-v2 = <&gpu_opp_table>;
};
&dmc {
operating-points-v2 = <&dmc_opp_table>;
};

View File

@@ -45,6 +45,7 @@
#include <dt-bindings/sensor-dev.h>
#include "rk3399.dtsi"
#include "rk3399-android.dtsi"
#include "rk3399-opp.dtsi"
/ {
model = "Rockchip RK3399 VR Board";
@@ -187,194 +188,6 @@
};
};
&cluster0_opp {
opp@408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <850000>;
clock-latency-ns = <40000>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <925000>;
clock-latency-ns = <40000>;
};
opp@1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1075000>;
clock-latency-ns = <40000>;
};
opp@1512000000 {
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt = <1100000>;
clock-latency-ns = <40000>;
status="disabled";
};
};
&cluster1_opp {
opp@408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <825000>;
clock-latency-ns = <40000>;
};
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <850000>;
clock-latency-ns = <40000>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <900000>;
clock-latency-ns = <40000>;
};
opp@1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <40000>;
};
opp@1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1050000>;
clock-latency-ns = <40000>;
};
opp@1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1150000>;
clock-latency-ns = <40000>;
};
opp@1992000000 {
opp-hz = /bits/ 64 <1992000000>;
opp-microvolt = <1225000>;
clock-latency-ns = <40000>;
};
};
&CPU_COST_A72 {
busy-cost-data = <
210 129 /* 408MHz */
308 184 /* 600MHz */
419 246 /* 816MHz */
518 335 /* 1008MHz */
617 428 /* 1200MHz */
728 573 /* 1416MHz */
827 724 /* 1608MHz */
925 900 /* 1800MHz */
1024 1108 /* 1992MHz */
>;
idle-cost-data = <
15
15
0
>;
};
&CPU_COST_A53 {
busy-cost-data = <
108 46 /* 408M */
159 67 /* 600M */
216 90 /* 816M */
267 120 /* 1008M */
318 153 /* 1200M */
375 198 /* 1416M */
401 222 /* 1512M */
>;
idle-cost-data = <
6
6
0
>;
};
&CLUSTER_COST_A72 {
busy-cost-data = <
210 129 /* 408MHz */
308 184 /* 600MHz */
419 246 /* 816MHz */
518 335 /* 1008MHz */
617 428 /* 1200MHz */
728 573 /* 1416MHz */
827 724 /* 1608MHz */
925 900 /* 1800MHz */
1024 1108 /* 1992MHz */
>;
idle-cost-data = <
65
65
65
>;
};
&CLUSTER_COST_A53 {
busy-cost-data = <
108 46 /* 408M */
159 67 /* 600M */
216 90 /* 816M */
267 120 /* 1008M */
318 153 /* 1200M */
375 198 /* 1416M */
401 222 /* 1512M */
>;
idle-cost-data = <
56
56
56
>;
};
&gpu_opp_table {
compatible = "operating-points-v2";
opp-shared;
opp@200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <825000>;
};
opp@300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <850000>;
};
opp@400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <875000>;
};
opp@500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <950000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1025000>;
};
opp@800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1125000>;
};
};
&sdmmc {
clock-frequency = <150000000>;
clock-freq-min-max = <400000 150000000>;

View File

@@ -42,6 +42,7 @@
#include "dt-bindings/pwm/pwm.h"
#include "rk3399.dtsi"
#include "rk3399-opp.dtsi"
/ {
compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
@@ -650,186 +651,6 @@
status = "okay";
};
&cluster0_opp {
opp@408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <875000>;
clock-latency-ns = <40000>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <925000>;
clock-latency-ns = <40000>;
};
opp@1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1050000>;
clock-latency-ns = <40000>;
};
};
&cluster1_opp {
opp@408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <825000>;
clock-latency-ns = <40000>;
};
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <875000>;
clock-latency-ns = <40000>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <950000>;
clock-latency-ns = <40000>;
};
opp@1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1025000>;
clock-latency-ns = <40000>;
};
opp@1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1100000>;
clock-latency-ns = <40000>;
};
opp@1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1175000>;
clock-latency-ns = <40000>;
};
opp@1992000000 {
opp-hz = /bits/ 64 <1992000000>;
opp-microvolt = <1250000>;
clock-latency-ns = <40000>;
};
};
&CPU_COST_A72 {
busy-cost-data = <
210 129 /* 408MHz */
308 184 /* 600MHz */
419 246 /* 816MHz */
518 335 /* 1008MHz */
617 428 /* 1200MHz */
728 573 /* 1416MHz */
827 724 /* 1608MHz */
925 900 /* 1800MHz */
1024 1108 /* 1992MHz */
>;
idle-cost-data = <
15
15
0
>;
};
&CPU_COST_A53 {
busy-cost-data = <
108 46 /* 408M */
159 67 /* 600M */
216 90 /* 816M */
267 120 /* 1008M */
318 153 /* 1200M */
375 198 /* 1416M */
401 222 /* 1512M */
>;
idle-cost-data = <
6
6
0
>;
};
&CLUSTER_COST_A72 {
busy-cost-data = <
210 129 /* 408MHz */
308 184 /* 600MHz */
419 246 /* 816MHz */
518 335 /* 1008MHz */
617 428 /* 1200MHz */
728 573 /* 1416MHz */
827 724 /* 1608MHz */
925 900 /* 1800MHz */
1024 1108 /* 1992MHz */
>;
idle-cost-data = <
65
65
65
>;
};
&CLUSTER_COST_A53 {
busy-cost-data = <
108 46 /* 408M */
159 67 /* 600M */
216 90 /* 816M */
267 120 /* 1008M */
318 153 /* 1200M */
375 198 /* 1416M */
401 222 /* 1512M */
>;
idle-cost-data = <
56
56
56
>;
};
&gpu_opp_table {
opp@200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <800000>;
};
opp@300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <800000>;
};
opp@400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <800000>;
};
opp@500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <900000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <900000>;
};
opp@800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1000000>;
};
};
&pinctrl {
pmic {
pmic_int_l: pmic-int-l {

View File

@@ -1,150 +1,117 @@
/* static struct idle_state idle_states_cluster_a53[] = { */
/* { .power = 56 }, /\* arch_cpu_idle() (active idle) = WFI *\/ */
/* { .power = 56 }, /\* WFI *\/ */
/* { .power = 56 }, /\* cpu-sleep-0 *\/ */
/* }; */
/*
* Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/* static struct idle_state idle_states_cluster_a72[] = { */
/* { .power = 65 }, /\* arch_cpu_idle() (active idle) = WFI *\/ */
/* { .power = 65 }, /\* WFI *\/ */
/* { .power = 65 }, /\* cpu-sleep-0 *\/ */
/* }; */
/ {
energy-costs {
RK3399_CPU_COST_0: rk3399-core-cost0 {
busy-cost-data = <
108 46 /* 408M */
159 67 /* 600M */
216 90 /* 816M */
267 120 /* 1008M */
318 153 /* 1200M */
375 198 /* 1416M */
401 222 /* 1512M */
>;
idle-cost-data = <
6
6
0
>;
};
/* static struct capacity_state cap_states_cluster_a53[] = { */
/* /\* Power per cluster *\/ */
/* { .cap = 121, .power = 26, }, /\* 408 MHz *\/ */
/* { .cap = 179, .power = 30, }, /\* 600 MHz *\/ */
/* { .cap = 243, .power = 39, }, /\* 816 MHz *\/ */
/* { .cap = 300, .power = 47, }, /\* 1008 MHz *\/ */
/* { .cap = 357, .power = 57, }, /\* 1200 Mhz *\/ */
/* { .cap = 421, .power = 67, }, /\* 1416 Mhz *\/ */
/* }; */
RK3399_CPU_COST_1: rk3399-core-cost1 {
busy-cost-data = <
210 129 /* 408MHz */
308 184 /* 600MHz */
419 246 /* 816MHz */
518 335 /* 1008MHz */
617 428 /* 1200MHz */
728 573 /* 1416MHz */
827 724 /* 1608MHz */
925 900 /* 1800MHz */
1024 1108 /* 1992MHz */
>;
idle-cost-data = <
15
15
0
>;
};
/* static struct capacity_state cap_states_cluster_a72[] = { */
/* /\* Power per cluster *\/ */
/* { .cap = 232, .power = 24, }, /\* 408 MHz *\/ */
/* { .cap = 341, .power = 32, }, /\* 600 MHz *\/ */
/* { .cap = 464, .power = 43, }, /\* 816 MHz *\/ */
/* { .cap = 573, .power = 49, }, /\* 1008 MHz *\/ */
/* { .cap = 683, .power = 64, }, /\* 1200 MHz *\/ */
/* { .cap = 805, .power = 74, }, /\* 1416 MHz *\/ */
/* { .cap = 915, .power = 84, }, /\* 1608 MHz *\/ */
/* { .cap = 1024, .power = 94, }, /\* 1800 MHz *\/ */
/* }; */
RK3399_CLUSTER_COST_0: rk3399-cluster-cost0 {
busy-cost-data = <
108 46 /* 408M */
159 67 /* 600M */
216 90 /* 816M */
267 120 /* 1008M */
318 153 /* 1200M */
375 198 /* 1416M */
401 222 /* 1512M */
>;
idle-cost-data = <
56
56
56
>;
};
/* static struct sched_group_energy energy_cluster_a53 = { */
/* .nr_idle_states = ARRAY_SIZE(idle_states_cluster_a53), */
/* .idle_states = idle_states_cluster_a53, */
/* .nr_cap_states = ARRAY_SIZE(cap_states_cluster_a53), */
/* .cap_states = cap_states_cluster_a53, */
/* }; */
/* static struct sched_group_energy energy_cluster_a57 = { */
/* .nr_idle_states = ARRAY_SIZE(idle_states_cluster_a72), */
/* .idle_states = idle_states_cluster_a72, */
/* .nr_cap_states = ARRAY_SIZE(cap_states_cluster_a72), */
/* .cap_states = cap_states_cluster_a72, */
/* }; */
/* static struct idle_state idle_states_core_a53[] = { */
/* { .power = 6 }, /\* arch_cpu_idle() (active idle) = WFI *\/ */
/* { .power = 6 }, /\* WFI *\/ */
/* { .power = 0 }, /\* cpu-sleep-0 *\/ */
/* }; */
/* static struct idle_state idle_states_core_a72[] = { */
/* { .power = 15 }, /\* arch_cpu_idle() (active idle) = WFI *\/ */
/* { .power = 15 }, /\* WFI *\/ */
/* { .power = 0 }, /\* cpu-sleep-0 *\/ */
/* }; */
/* static struct capacity_state cap_states_core_a53[] = { */
/* /\* Power per cpu *\/ */
/* { .cap = 121, .power = 40, }, /\* 408 MHz *\/ */
/* { .cap = 179, .power = 62, }, /\* 600 MHz *\/ */
/* { .cap = 243, .power = 90, }, /\* 816 MHz *\/ */
/* { .cap = 300, .power = 126, }, /\* 1008 MHz *\/ */
/* { .cap = 357, .power = 196, }, /\* 1200 Mhz *\/ */
/* { .cap = 421, .power = 246, }, /\* 1416 Mhz *\/ */
/* }; */
/* static struct capacity_state cap_states_core_a72[] = { */
/* /\* Power per cpu *\/ */
/* { .cap = 232, .power = 349, }, /\* 408 MHz *\/ */
/* { .cap = 341, .power = 547, }, /\* 600 MHz *\/ */
/* { .cap = 464, .power = 794, }, /\* 816 MHz *\/ */
/* { .cap = 573, .power = 1141, }, /\* 1008 MHz *\/ */
/* { .cap = 683, .power = 1850, }, /\* 1200 MHz *\/ */
/* { .cap = 805, .power = 2499, }, /\* 1416 MHz *\/ */
/* { .cap = 915, .power = 2922, }, /\* 1608 MHz *\/ */
/* { .cap = 1024, .power = 3416, }, /\* 1800 MHz *\/ */
/* }; */
energy-costs {
CPU_COST_A72: core-cost0 {
busy-cost-data = <
232 349 /* 408MHz */
341 547 /* 600MHz */
464 794 /* 816MHz */
573 1141 /* 1008MHz */
683 1850 /* 1200MHz */
// 805 2499 /* 1416MHz */
// 915 2922 /* 1608MHz */
// 1024 3416 /* 1800MHz */
>;
idle-cost-data = <
15
15
0
>;
};
CPU_COST_A53: core-cost1 {
busy-cost-data = <
121 40 /* 408M */
179 62 /* 600M */
243 90 /* 816M */
300 126 /* 1008M */
357 196 /* 1200M */
421 246 /* 1416M */
// 449 263 /* 1512M */
>;
idle-cost-data = <
6
6
0
>;
};
CLUSTER_COST_A72: cluster-cost0 {
busy-cost-data = <
232 349 /* 408MHz */
341 547 /* 600MHz */
464 794 /* 816MHz */
573 1141 /* 1008MHz */
683 1850 /* 1200MHz */
// 805 2499 /* 1416MHz */
// 915 2922 /* 1608MHz */
// 1024 3416 /* 1800MHz */
>;
idle-cost-data = <
65
65
65
>;
};
CLUSTER_COST_A53: cluster-cost1 {
busy-cost-data = <
121 40 /* 408M */
179 62 /* 600M */
243 90 /* 816M */
300 126 /* 1008M */
357 196 /* 1200M */
421 246 /* 1416M */
// 449 263 /* 1512M */
>;
idle-cost-data = <
56
56
56
>;
RK3399_CLUSTER_COST_1: rk3399-cluster-cost1 {
busy-cost-data = <
210 129 /* 408MHz */
308 184 /* 600MHz */
419 246 /* 816MHz */
518 335 /* 1008MHz */
617 428 /* 1200MHz */
728 573 /* 1416MHz */
827 724 /* 1608MHz */
925 900 /* 1800MHz */
1024 1108 /* 1992MHz */
>;
idle-cost-data = <
65
65
65
>;
};
};
};

View File

@@ -45,6 +45,7 @@
#include <dt-bindings/sensor-dev.h>
#include "rk3399.dtsi"
#include "rk3399-android.dtsi"
#include "rk3399-opp.dtsi"
/ {
model = "Rockchip RK3399 VR Board";
@@ -299,195 +300,6 @@
};
};
&cluster0_opp {
opp@408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <850000>;
clock-latency-ns = <40000>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <925000>;
clock-latency-ns = <40000>;
};
opp@1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1075000>;
clock-latency-ns = <40000>;
};
opp@1512000000 {
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt = <1100000>;
clock-latency-ns = <40000>;
status="disabled";
};
};
&cluster1_opp {
opp@408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <825000>;
clock-latency-ns = <40000>;
};
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <850000>;
clock-latency-ns = <40000>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <900000>;
clock-latency-ns = <40000>;
};
opp@1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <40000>;
};
opp@1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1050000>;
clock-latency-ns = <40000>;
};
opp@1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1150000>;
clock-latency-ns = <40000>;
};
opp@1992000000 {
opp-hz = /bits/ 64 <1992000000>;
opp-microvolt = <1225000>;
clock-latency-ns = <40000>;
};
};
&CPU_COST_A72 {
busy-cost-data = <
210 129 /* 408MHz */
308 184 /* 600MHz */
419 246 /* 816MHz */
518 335 /* 1008MHz */
617 428 /* 1200MHz */
728 573 /* 1416MHz */
827 724 /* 1608MHz */
925 900 /* 1800MHz */
1024 1108 /* 1992MHz */
>;
idle-cost-data = <
15
15
0
>;
};
&CPU_COST_A53 {
busy-cost-data = <
108 46 /* 408M */
159 67 /* 600M */
216 90 /* 816M */
267 120 /* 1008M */
318 153 /* 1200M */
375 198 /* 1416M */
401 222 /* 1512M */
>;
idle-cost-data = <
6
6
0
>;
};
&CLUSTER_COST_A72 {
busy-cost-data = <
210 129 /* 408MHz */
308 184 /* 600MHz */
419 246 /* 816MHz */
518 335 /* 1008MHz */
617 428 /* 1200MHz */
728 573 /* 1416MHz */
827 724 /* 1608MHz */
925 900 /* 1800MHz */
1024 1108 /* 1992MHz */
>;
idle-cost-data = <
65
65
65
>;
};
&CLUSTER_COST_A53 {
busy-cost-data = <
108 46 /* 408M */
159 67 /* 600M */
216 90 /* 816M */
267 120 /* 1008M */
318 153 /* 1200M */
375 198 /* 1416M */
401 222 /* 1512M */
>;
idle-cost-data = <
56
56
56
>;
};
&gpu_opp_table {
compatible = "operating-points-v2";
opp-shared;
opp@200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <825000>;
status = "disabled";
};
opp@300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <850000>;
};
opp@400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <875000>;
};
opp@500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <950000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1025000>;
};
opp@800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1125000>;
};
};
&sdmmc {
clock-frequency = <150000000>;
clock-freq-min-max = <400000 150000000>;

View File

@@ -119,8 +119,6 @@
dynamic-power-coefficient = <100>;
clocks = <&cru ARMCLKL>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
operating-points-v2 = <&cluster0_opp>;
sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
};
cpu_l1: cpu@1 {
@@ -130,8 +128,6 @@
enable-method = "psci";
clocks = <&cru ARMCLKL>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
operating-points-v2 = <&cluster0_opp>;
sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
};
cpu_l2: cpu@2 {
@@ -141,8 +137,6 @@
enable-method = "psci";
clocks = <&cru ARMCLKL>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
operating-points-v2 = <&cluster0_opp>;
sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
};
cpu_l3: cpu@3 {
@@ -152,8 +146,6 @@
enable-method = "psci";
clocks = <&cru ARMCLKL>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
operating-points-v2 = <&cluster0_opp>;
sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
};
cpu_b0: cpu@100 {
@@ -165,8 +157,6 @@
dynamic-power-coefficient = <436>;
clocks = <&cru ARMCLKB>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
operating-points-v2 = <&cluster1_opp>;
sched-energy-costs = <&CPU_COST_A72 &CLUSTER_COST_A72>;
};
cpu_b1: cpu@101 {
@@ -176,8 +166,6 @@
enable-method = "psci";
clocks = <&cru ARMCLKB>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
operating-points-v2 = <&cluster1_opp>;
sched-energy-costs = <&CPU_COST_A72 &CLUSTER_COST_A72>;
};
idle-states {
@@ -201,76 +189,6 @@
min-residency-us = <2000>;
};
};
/include/ "rk3399-sched-energy.dtsi"
};
cluster0_opp: opp_table0 {
compatible = "operating-points-v2";
opp-shared;
opp@408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <875000>;
clock-latency-ns = <40000>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <925000>;
clock-latency-ns = <40000>;
};
opp@1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1025000>;
clock-latency-ns = <40000>;
};
};
cluster1_opp: opp_table1 {
compatible = "operating-points-v2";
opp-shared;
opp@408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <800000>;
clock-latency-ns = <40000>;
};
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <850000>;
clock-latency-ns = <40000>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <925000>;
clock-latency-ns = <40000>;
};
};
cpu_avs: cpu-avs {
@@ -1324,19 +1242,9 @@
clocks = <&cru SCLK_DDRCLK>;
clock-names = "dmc_clk";
ddr_timing = <&ddr_timing>;
operating-points-v2 = <&dmc_opp_table>;
status = "disabled";
};
dmc_opp_table: dmc_opp_table {
compatible = "operating-points-v2";
opp00 {
opp-hz = /bits/ 64 <666000000>;
opp-microvolt = <900000>;
};
};
rga: rga@ff680000 {
compatible = "rockchip,rk3399-rga";
reg = <0x0 0xff680000 0x0 0x10000>;
@@ -1649,7 +1557,6 @@
clocks = <&cru ACLK_GPU>;
clock-names = "clk_mali";
#cooling-cells = <2>; /* min followed by max */
operating-points-v2 = <&gpu_opp_table>;
power-domains = <&power RK3399_PD_GPU>;
power-off-delay-ms = <200>;
status = "disabled";
@@ -1665,25 +1572,6 @@
};
};
gpu_opp_table: gpu_opp_table {
compatible = "operating-points-v2";
opp-shared;
opp@200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <900000>;
};
opp@300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <900000>;
};
opp@400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <900000>;
};
};
vopl: vop@ff8f0000 {
compatible = "rockchip,rk3399-vop-lit";
reg = <0x0 0xff8f0000 0x0 0x3efc>;