emmc: run hs400 200M busmode on tl1 [1/1]

PD#SWPL-11266

Problem:
tl1 is running hs200 200M

Solution:
modify dts

Verify:
passed on tl1_t962x2_x301

Change-Id: Ib515d62e92564bb71980bb8122de7dc54a89a2fb
Signed-off-by: Ruixuan Li <ruixuan.li@amlogic.com>
This commit is contained in:
Ruixuan Li
2019-07-23 14:44:53 +08:00
committed by Tao Zeng
parent 085af450ef
commit 939e43d35a
8 changed files with 14 additions and 15 deletions

View File

@@ -1829,8 +1829,7 @@
"MMC_CAP_HW_RESET",
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200";
/* "MMC_CAP2_HS400";*/
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <200000000>;
};

View File

@@ -1873,8 +1873,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23",
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200";
/* "MMC_CAP2_HS400";*/
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <200000000>;
};

View File

@@ -1972,8 +1972,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23",
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200";
/*MMC_CAP2_HS400"*/
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <200000000>;
};

View File

@@ -1969,8 +1969,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23",
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200";
/*MMC_CAP2_HS400"*/
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <200000000>;
};

View File

@@ -1879,8 +1879,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23",
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200";
/* "MMC_CAP2_HS400";*/
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <200000000>;
};

View File

@@ -1968,8 +1968,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23",
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200";
/*MMC_CAP2_HS400"*/
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <200000000>;
};

View File

@@ -1961,8 +1961,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23",
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200";
/*MMC_CAP2_HS400"*/
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <200000000>;
};

View File

@@ -1118,7 +1118,13 @@ static u32 scan_emmc_cmd_win(struct mmc_host *mmc, int send_status)
writel(delay2, host->base + SD_EMMC_DELAY2_V3);
offset = (u32)(get_random_long() % capacity);
for (j = 0; j < repeat_times; j++) {
err = single_read_cmd_for_scan(mmc,
if (send_status)
err = emmc_send_cmd(mmc,
MMC_SEND_STATUS,
1 << 16,
MMC_RSP_R1 | MMC_CMD_AC);
else
err = single_read_cmd_for_scan(mmc,
MMC_READ_SINGLE_BLOCK,
host->blk_test, 512, 1,
offset);