1. add mtd rk29 nandc driver & yaffs2 2.modify rk29_sdk_defconfig to enable I/D cache and config mtd/yaffs2 filesystem

This commit is contained in:
hxy
2010-11-06 11:58:19 +08:00
parent 7abcfd1c42
commit 94e13fa2d5
11 changed files with 1382 additions and 28 deletions

View File

@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.32.9
# Wed Oct 20 15:12:34 2010
# Sat Nov 6 11:33:18 2010
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -68,16 +68,10 @@ CONFIG_RESOURCE_COUNTERS=y
# CONFIG_RELAY is not set
# CONFIG_NAMESPACES is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE="../initramfs"
CONFIG_INITRAMFS_ROOT_UID=0
CONFIG_INITRAMFS_ROOT_GID=0
# CONFIG_RD_GZIP is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_RD_GZIP=y
# CONFIG_RD_BZIP2 is not set
# CONFIG_RD_LZMA is not set
CONFIG_INITRAMFS_COMPRESSION_NONE=y
# CONFIG_INITRAMFS_COMPRESSION_GZIP is not set
# CONFIG_INITRAMFS_COMPRESSION_BZIP2 is not set
# CONFIG_INITRAMFS_COMPRESSION_LZMA is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
@@ -224,8 +218,8 @@ CONFIG_CPU_CP15_MMU=y
#
CONFIG_ARM_THUMB=y
# CONFIG_ARM_THUMBEE is not set
CONFIG_CPU_ICACHE_DISABLE=y
CONFIG_CPU_DCACHE_DISABLE=y
# CONFIG_CPU_ICACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_DISABLE is not set
# CONFIG_CPU_BPREDICT_DISABLE is not set
CONFIG_HAS_TLS_REG=y
CONFIG_ARM_L1_CACHE_SHIFT=5
@@ -425,7 +419,89 @@ CONFIG_EXTRA_FIRMWARE=""
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_CONNECTOR is not set
# CONFIG_MTD is not set
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_TESTS is not set
# CONFIG_MTD_CONCAT is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_REDBOOT_PARTS is not set
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_AFS_PARTS is not set
# CONFIG_MTD_AR7_PARTS is not set
#
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
# CONFIG_RFD_FTL is not set
# CONFIG_SSFDC is not set
# CONFIG_MTD_OOPS is not set
#
# RAM/ROM/Flash chip drivers
#
# CONFIG_MTD_CFI is not set
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
CONFIG_MTD_MAP_BANK_WIDTH_2=y
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_PLATRAM is not set
#
# Self-contained MTD device drivers
#
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLOCK2MTD is not set
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
CONFIG_MTD_NAND_IDS=y
CONFIG_MTD_NAND=y
# CONFIG_MTD_NAND_VERIFY_WRITE is not set
# CONFIG_MTD_NAND_ECC_SMC is not set
# CONFIG_MTD_NAND_MUSEUM_IDS is not set
# CONFIG_MTD_NAND_GPIO is not set
# CONFIG_MTD_NAND_DISKONCHIP is not set
CONFIG_MTD_NAND_RK29=y
# CONFIG_MTD_NAND_NANDSIM is not set
# CONFIG_MTD_NAND_PLATFORM is not set
# CONFIG_MTD_ONENAND is not set
#
# LPDDR flash memory drivers
#
# CONFIG_MTD_LPDDR is not set
#
# UBI - Unsorted block images
#
# CONFIG_MTD_UBI is not set
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_COW_COMMON is not set
@@ -435,6 +511,7 @@ CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_MG_DISK is not set
CONFIG_MISC_DEVICES=y
# CONFIG_ANDROID_PMEM is not set
# CONFIG_ENCLOSURE_SERVICES is not set
@@ -711,6 +788,11 @@ CONFIG_ANDROID_LOW_MEMORY_KILLER=y
#
# CONFIG_RK2818_POWER is not set
#
# GPU Vivante
#
CONFIG_VIVANTE=y
#
# CMMB
#
@@ -719,22 +801,12 @@ CONFIG_ANDROID_LOW_MEMORY_KILLER=y
#
# File systems
#
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
CONFIG_EXT3_FS_XATTR=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4_FS is not set
CONFIG_JBD=y
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_BTRFS_FS is not set
@@ -789,6 +861,18 @@ CONFIG_MISC_FILESYSTEMS=y
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
CONFIG_YAFFS_FS=y
CONFIG_YAFFS_YAFFS1=y
# CONFIG_YAFFS_9BYTE_TAGS is not set
# CONFIG_YAFFS_DOES_ECC is not set
CONFIG_YAFFS_YAFFS2=y
CONFIG_YAFFS_AUTO_YAFFS2=y
# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
# CONFIG_YAFFS_EMPTY_LOST_AND_FOUND is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
@@ -1040,6 +1124,8 @@ CONFIG_CRC16=y
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_DECOMPRESS_GZIP=y
CONFIG_REED_SOLOMON=y
CONFIG_REED_SOLOMON_ENC8=y
CONFIG_REED_SOLOMON_DEC8=y

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@@ -28,7 +28,7 @@
#include <linux/mtd/partitions.h>
#include <mach/gpio.h>
#include <mach/rk2818_nand.h>
#include <mach/rk29_nand.h>
#include <mach/iomux.h>
#include <mach/rk2818_camera.h> /* ddl@rock-chips.com : camera support */
#include <linux/i2c.h>

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@@ -35,6 +35,7 @@
#include <mach/irqs.h>
#include <mach/rk29_iomap.h>
#include <mach/board.h>
#include <mach/rk29_nand.h>
#include <linux/mtd/nand.h>
@@ -44,6 +45,17 @@
extern struct sys_timer rk29_timer;
int rk29_nand_io_init(void)
{
return 0;
}
struct rk29_nand_platform_data rk29_nand_data = {
.width = 1, /* data bus width in bytes */
.hw_ecc = 1, /* hw ecc 0: soft ecc */
.num_flash = 1,
.io_init = rk29_nand_io_init,
};
static struct rk29_gpio_bank rk29_gpiobankinit[] = {
{
@@ -280,6 +292,9 @@ static struct platform_device *devices[] __initdata = {
#ifdef CONFIG_UART1_RK29
&rk29_device_uart1,
#endif
#ifdef CONFIG_MTD_NAND_RK29
&rk29_device_nand,
#endif
#ifdef CONFIG_FB_RK29
&rk29_device_fb,

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@@ -20,6 +20,7 @@
#include <mach/irqs.h>
#include <mach/rk29_iomap.h>
#include "devices.h"
/*
* rk29 4 uarts device
@@ -172,4 +173,24 @@ struct platform_device rk29_device_fb = {
}
};
#endif
#if defined(CONFIG_MTD_NAND_RK29)
static struct resource nand_resources[] = {
{
.start = RK29_NANDC_PHYS,
.end = RK29_NANDC_PHYS+RK29_NANDC_SIZE -1,
.flags = IORESOURCE_MEM,
}
};
struct platform_device rk29_device_nand = {
.name = "rk29-nand",
.id = -1,
.resource = nand_resources,
.num_resources= ARRAY_SIZE(nand_resources),
.dev = {
.platform_data= &rk29_nand_data,
},
};
#endif

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@@ -16,6 +16,7 @@
#ifndef __ARCH_ARM_MACH_RK29_DEVICES_H
#define __ARCH_ARM_MACH_RK29_DEVICES_H
extern struct rk29_nand_platform_data rk29_nand_data;
extern struct platform_device rk29_device_uart0;
extern struct platform_device rk29_device_uart1;
@@ -23,5 +24,6 @@ extern struct platform_device rk29_device_uart2;
extern struct platform_device rk29_device_uart3;
extern struct platform_device rk29_device_gpu;
extern struct platform_device rk29_device_fb;
extern struct platform_device rk29_device_nand;
#endif

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@@ -0,0 +1,128 @@
/*
* arch/arm/mach-rk29/include/mach/rk29_nand.h
*
* Copyright (C) 2010 RockChip, Inc.
* Author:
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __ASM_ARCH_RK29_NAND_H
#define __ASM_ARCH_RK29_NAND_H
//BCHCTL<54>Ĵ<EFBFBD><C4B4><EFBFBD>
#define BCH_WR 0x0002
#define BCH_RST 0x0001
//FLCTL<54>Ĵ<EFBFBD><C4B4><EFBFBD>
#define FL_RDY (0x1<<20)
#define FL_LBA_EN (0x1<<11)
#define FL_COR_EN (0x1<<10)
#define FL_INT_EN (0x1<<9)
#define FL_INTCLR (0x1<<8)
#define FL_STMOD (0x1<<7)
#define FL_TRCNT (0x3<<5)
#define FL_STADDR (0x1<<4)
#define FL_BYPASS (0x1<<3)
#define FL_START (0x1<<2)
#define FL_RDN (0x1<<1)
#define FL_RST (0x1<<0)
//FMCTL<54>Ĵ<EFBFBD><C4B4><EFBFBD>
#define FMC_WP (0x1<<8)
#define FMC_FRDY (0x1<<9)
#define FMC_FRDY_INT_EN (0x1<<10)
#define FMC_FRDY_INT_CLR (0x1<<11)
//FMWAIT<49>Ĵ<EFBFBD><C4B4><EFBFBD>
#define FMW_RWCS_OFFSET 0
#define FMW_RWPW_OFFSET 5
#define FMW_RDY (0x1<<11)
#define FMW_CSRW_OFFSET 12
#define FMW_DLY_OFFSET 24//16
struct rk29_nand_timing {
unsigned int tCH; /* Enable signal hold time */
unsigned int tCS; /* Enable signal setup time */
unsigned int tWH; /* ND_nWE high duration */
unsigned int tWP; /* ND_nWE pulse time */
unsigned int tRH; /* ND_nRE high duration */
unsigned int tRP; /* ND_nRE pulse width */
unsigned int tR; /* ND_nWE high to ND_nRE low for read */
unsigned int tWHR; /* ND_nWE high to ND_nRE low for status read */
unsigned int tAR; /* ND_ALE low to ND_nRE low delay */
};
struct rk29_nand_cmdset {
uint16_t read1;
uint16_t read2;
uint16_t program;
uint16_t read_status;
uint16_t read_id;
uint16_t erase;
uint16_t reset;
uint16_t lock;
uint16_t unlock;
uint16_t lock_status;
};
typedef volatile struct tagCHIP_IF
{
uint32_t data;
uint32_t addr;
uint32_t cmd;
uint32_t RESERVED[0x3d];
}CHIP_IF, *pCHIP_IF;
//NANDC Registers
typedef volatile struct tagNANDC
{
volatile uint32_t FMCTL;
volatile uint32_t FMWAIT;
volatile uint32_t FLCTL;
volatile uint32_t BCHCTL;
volatile uint32_t BCHST;
volatile uint32_t RESERVED1[(0x200-0x14)/4]; //FLR
volatile uint32_t spare[0x200/4];
volatile uint32_t FMCTL1;
volatile uint32_t FMWAIT1;
volatile uint32_t FLCTL1;
volatile uint32_t BCHCTL1;
volatile uint32_t BCHST1;
volatile uint32_t RESERVED2[(0x200-0x14)/4];
volatile uint32_t RESERVED3[0x200/4];
volatile CHIP_IF chip[8];
volatile uint32_t buf[0x800/4];
}NANDC, *pNANDC;
struct rk29_nand_flash {
const struct rk29_nand_timing *timing; /* NAND Flash timing */
const struct rk29_nand_cmdset *cmdset;
uint32_t page_per_block; /* Pages per block (PG_PER_BLK) */
uint32_t page_size; /* Page size in bytes (PAGE_SZ) */
uint32_t flash_width; /* Width of Flash memory (DWIDTH_M) */
uint32_t num_blocks; /* Number of physical blocks in Flash */
uint32_t chip_id;
};
struct rk29_nand_platform_data {
int width; /* data bus width in bytes */
int hw_ecc; /* 1:hw ecc, 0: soft ecc */
struct mtd_partition *parts;
unsigned int nr_parts;
size_t num_flash;
int (*io_init)(void);
int (*io_deinit)(void);
};
#endif /* __ASM_ARCH_RK29_NAND_H */

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@@ -45,6 +45,7 @@ static struct map_desc rk29_io_desc[] __initdata = {
RK29_DEVICE(GPIO4),
RK29_DEVICE(GPIO5),
RK29_DEVICE(GPIO6),
RK29_DEVICE(NANDC),
};
void __init rk29_map_common_io(void)

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@@ -365,6 +365,11 @@ config MTD_NAND_RK2818
depends on ARCH_RK2818
help
This enables the NAND flash controller on the RK2818 SoC
config MTD_NAND_RK29
tristate "NAND Flash support for RK29sdk"
depends on ARCH_RK29
help
This enables the NAND flash controller on the RK29 SoC
config MTD_NAND_PXA3xx
tristate "Support for NAND flash devices on PXA3xx"

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@@ -43,5 +43,5 @@ obj-$(CONFIG_MTD_NAND_TXX9NDFMC) += txx9ndfmc.o
obj-$(CONFIG_MTD_NAND_W90P910) += w90p910_nand.o
obj-$(CONFIG_MTD_NAND_NOMADIK) += nomadik_nand.o
obj-$(CONFIG_MTD_NAND_RK2818) += rk2818_nand.o
obj-$(CONFIG_MTD_NAND_RK29) += rk29_nand.o
nand-objs := nand_base.o nand_bbt.o

1096
drivers/mtd/nand/rk29_nand.c Normal file

File diff suppressed because it is too large Load Diff

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@@ -2189,7 +2189,7 @@ static struct super_block *yaffs_internal_read_super(int yaffsVersion,
dev->nReservedBlocks = 5;
dev->nShortOpCaches = (options.no_cache) ? 0 : 10;
dev->inbandTags = options.inband_tags;
#ifdef CONFIG_ARCH_RK2818
#if defined (CONFIG_ARCH_RK2818) || (CONFIG_ARCH_RK29)
dev->inbandTags = 1;
#endif