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arm64: dts: rockchip: rk3588: fix up the clocks

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Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I4136922bea4e4e47e580a644593f7b98310623e7
This commit is contained in:
Elaine Zhang
2021-08-23 15:25:01 +08:00
committed by Tao Huang
parent a545faf078
commit 958d13f841
2 changed files with 9 additions and 11 deletions
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19
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
View File

@@ -159,7 +159,7 @@
compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
reg = <0x0 0xfd890000 0x0 0x100>;
interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&xin24m>, <&xin24m>;
clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
clock-names = "baudclk", "apb_pclk";
reg-shift = <2>;
reg-io-width = <4>;
@@ -172,8 +172,8 @@
reg = <0x0 0xfe2c0000 0x0 0x4000>;
interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
max-frequency = <150000000>;
clocks = <&xin24m>, <&xin24m>,
<&xin24m>, <&xin24m>;
clocks = <&scmi_clk SCMI_HCLK_SD>, <&scmi_clk SCMI_CCLK_SD>,
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
status = "disabled";
@@ -214,8 +214,7 @@
reg = <0x0 0xfea10000 0x0 0x4000>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
//clocks = <&cru ACLK_BUS>;
clocks = <&xin24m>;
clocks = <&cru ACLK_DMAC0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
arm,pl330-periph-burst;
@@ -226,8 +225,7 @@
reg = <0x0 0xfea30000 0x0 0x4000>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
//clocks = <&cru ACLK_BUS>;
clocks = <&xin24m>;
clocks = <&cru ACLK_DMAC1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
arm,pl330-periph-burst;
@@ -237,7 +235,7 @@
compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
reg = <0x0 0xfeb50000 0x0 0x100>;
interrupts = <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&xin24m>, <&xin24m>;
clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
clock-names = "baudclk", "apb_pclk";
reg-shift = <2>;
reg-io-width = <4>;
@@ -248,7 +246,7 @@
compatible = "rockchip,rk3588-uart", "snps,dw-apb-uart";
reg = <0x0 0xfeb60000 0x0 0x100>;
interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&xin24m>, <&xin24m>;
clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
clock-names = "baudclk", "apb_pclk";
reg-shift = <2>;
reg-io-width = <4>;
@@ -260,8 +258,7 @@
reg = <0x0 0xfed10000 0x0 0x4000>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
//clocks = <&cru ACLK_BUS>;
clocks = <&xin24m>;
clocks = <&cru ACLK_DMAC2>;
clock-names = "apb_pclk";
#dma-cells = <1>;
arm,pl330-periph-burst;

1
include/dt-bindings/clock/rk3588-cru.h
View File

@@ -1451,6 +1451,7 @@
#define SCMI_CRYPTO_CORE 20
#define SCMI_CRYPTO_PKA 21
#define SCMI_SPLL 22
#define SCMI_HCLK_SD 23
/********Name=SECURE_SOFTRST_CON00,Offset=0xA00********/
#define SRST_A_SECURE_NS_BIU 10