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pinctrl:delete unused definition for rk3036

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This commit is contained in:
luowei
2014-07-11 17:10:21 +08:00
parent 5dc9dc6260
commit 9620f4d406
3 changed files with 138 additions and 100 deletions
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199
arch/arm/boot/dts/rk3036-pinctrl.dtsi
View File

@@ -83,29 +83,29 @@
uart0_xfer: uart0-xfer {
rockchip,pins = <UART0_SIN>,
<UART0_SOUT>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
uart0_cts: uart0-cts {
rockchip,pins = <UART0_CTSN>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
uart0_rts: uart0-rts {
rockchip,pins = <UART0_RTSN>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
uart0_rts_gpio: uart0-rts-gpio {
rockchip,pins = <FUNC_TO_GPIO(UART0_RTSN)>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
};
@@ -113,8 +113,8 @@
uart1_xfer: uart1-xfer {
rockchip,pins = <UART1_SIN>,
<UART1_SOUT>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
@@ -124,8 +124,8 @@
uart2_xfer: uart2-xfer {
rockchip,pins = <UART2_SIN>,
<UART2_SOUT>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
/* no rts / cts for uart2 */
@@ -135,101 +135,101 @@
gpio0_i2c0 {
i2c0_sda:i2c0-sda {
rockchip,pins = <I2C0_SDA>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
i2c0_scl:i2c0-scl {
rockchip,pins = <I2C0_SCL>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
i2c0_gpio: i2c0-gpio {
rockchip,pins = <FUNC_TO_GPIO(I2C0_SDA)>, <FUNC_TO_GPIO(I2C0_SCL)>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
};
gpio0_i2c1 {
i2c1_sda:i2c1-sda {
rockchip,pins = <I2C1_SDA>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
i2c1_scl:i2c1-scl {
rockchip,pins = <I2C1_SCL>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
i2c1_gpio: i2c1-gpio {
rockchip,pins = <FUNC_TO_GPIO(I2C1_SDA)>, <FUNC_TO_GPIO(I2C1_SCL)>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
};
};
gpio2_i2c2 {
i2c2_sda:i2c2-sda {
rockchip,pins = <I2C2_SDA>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
i2c2_scl:i2c2-scl {
rockchip,pins = <I2C2_SCL>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
i2c2_gpio: i2c2-gpio {
rockchip,pins = <FUNC_TO_GPIO(I2C2_SDA)>, <FUNC_TO_GPIO(I2C2_SCL)>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
};
gpio1_spi0 {
spi0_txd:spi0-txd {
rockchip,pins = <SPI0_TXD>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
spi0_rxd:spi0-rxd {
rockchip,pins = <SPI0_RXD>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
spi0_clk:spi0-clk {
rockchip,pins = <SPI0_CLK>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
spi0_cs0:spi0-cs0 {
rockchip,pins = <SPI0_CS0>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
spi0_cs1:spi0-cs1 {
rockchip,pins = <SPI0_CS1>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
@@ -238,70 +238,71 @@
gpio1_hdmi {
hdmi_cec:hdmi-cec {
rockchip,pins = <HDMI_CEC>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_8MA>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
};
hdmi_sda:hdmi-sda {
rockchip,pins = <HDMI_SDA>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_8MA>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
};
hdmi_scl:hdmi-scl {
rockchip,pins = <HDMI_SCL>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_8MA>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
};
hdmi_hpd:hdmi-hpd {
rockchip,pins = <HDMI_HPD>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_8MA>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
};
hdmi_gpio: hdmi-gpio {
rockchip,pins = <FUNC_TO_GPIO(HDMI_CEC)>, <FUNC_TO_GPIO(HDMI_SDA)>, <FUNC_TO_GPIO(HDMI_SCL)>, <FUNC_TO_GPIO(HDMI_HPD)>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
};
};
gpio1_i2s0 {
i2s0_mclk:i2s0-mclk {
rockchip,pins = <I2S0_MCLK>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_8MA>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
i2s0_sclk:i2s0-sclk {
rockchip,pins = <I2S0_SCLK>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_8MA>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
i2s0_lrckrx:i2s0-lrckrx {
rockchip,pins = <I2S0_LRCKRX>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_8MA>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
i2s0_lrcktx:i2s0-lrcktx {
rockchip,pins = <I2S0_LRCKTX>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_8MA>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
i2s0_sdo:i2s0-sdo {
rockchip,pins = <I2S0_SDO>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_8MA>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
i2s0_sdi:i2s0-sdi {
rockchip,pins = <I2S0_SDI>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_8MA>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
i2s0_gpio: i2s0-gpio {
@@ -311,31 +312,31 @@
<FUNC_TO_GPIO(I2S0_LRCKTX)>,
<FUNC_TO_GPIO(I2S0_SDO)>,
<FUNC_TO_GPIO(I2S0_SDI)>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_8MA>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
};
gpio1_spdif {
spdif_tx: spdif-tx {
rockchip,pins = <SPDIF_TX>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
};
gpio1_emmc0 {
emmc0_clk: emmc0-clk {
rockchip,pins = <EMMC_CLKOUT>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
emmc0_cmd: emmc0-cmd {
rockchip,pins = <EMMC_CMD>;
rockchip,pull = <VALUE_PULL_UP>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
};
@@ -343,7 +344,7 @@
emmc0_bus1: emmc0-bus-width1 {
rockchip,pins = <EMMC_D0>;
rockchip,pull = <VALUE_PULL_UP>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
};
@@ -353,7 +354,7 @@
<EMMC_D2 >,
<EMMC_D3>;
rockchip,pull = <VALUE_PULL_UP>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
};
};
@@ -361,21 +362,21 @@
gpio1_sdmmc0 {
sdmmc0_clk: sdmmc0-clk {
rockchip,pins = <MMC0_CLKOUT>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
sdmmc0_cmd: sdmmc0-cmd {
rockchip,pins = <MMC0_CMD>;
rockchip,pull = <VALUE_PULL_UP>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
};
sdmmc0_dectn: sdmmc0-dectn{
rockchip,pins = <MMC0_DETN>;
rockchip,pull = <VALUE_PULL_UP>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
};
@@ -383,7 +384,7 @@
sdmmc0_bus1: sdmmc0-bus-width1 {
rockchip,pins = <MMC0_D0>;
rockchip,pull = <VALUE_PULL_UP>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
};
@@ -393,7 +394,7 @@
<MMC0_D2>,
<MMC0_D3>;
rockchip,pull = <VALUE_PULL_UP>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
};
@@ -407,7 +408,7 @@
<GPIO1_C4>, //D2
<GPIO1_C5>; //D3
rockchip,pull = <VALUE_PULL_UP>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
};
@@ -416,22 +417,22 @@
gpio0_sdio0 {
sdio0_clk: sdio0_clk {
rockchip,pins = <MMC1_CLKOUT>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
sdio0_cmd: sdio0_cmd {
rockchip,pins = <MMC1_CMD>;
rockchip,pull = <VALUE_PULL_UP>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
};
sdio0_bus1: sdio0-bus-width1 {
rockchip,pins = <MMC1_D0>;
rockchip,pull = <VALUE_PULL_UP>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
};
@@ -441,7 +442,7 @@
<MMC1_D2>,
<MMC1_D3>;
rockchip,pull = <VALUE_PULL_UP>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
};
@@ -454,7 +455,7 @@
<GPIO0_B5>, //D2
<GPIO0_B6>; //D3
rockchip,pull = <VALUE_PULL_UP>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
};
};
@@ -462,29 +463,29 @@
gpio0_pwm{
pwm0_pin:pwm0 {
rockchip,pins = <PWM0>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
pwm1_pin:pwm1 {
rockchip,pins = <PWM1>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
pwm2_pin:pwm2 {
rockchip,pins = <PWM2>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
pwm3_pin:pwm3 {
rockchip,pins = <PWM3(IR)>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
};
@@ -492,29 +493,29 @@
gpio2_gmac {
mac_txpins: mac-txpins {
rockchip,pins = <MAC_TXD0>, <MAC_TXD1>, <MAC_TXEN>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
mac_rxpins: mac-rxpins {
rockchip,pins = <MAC_RXD0>, <MAC_RXD1>,<MAC_RXER>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
mac_crs: mac-crs {
rockchip,pins = <MAC_CRS>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
mac_mdpins: mac-mdpins {
rockchip,pins = <MAC_MDIO>, <MAC_MDC>;
rockchip,pull = <VALUE_PULL_DISABLE>;
//rockchip,drive = <VALUE_DRV_DEFAULT>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
};

33
drivers/pinctrl/pinctrl-rockchip.c
View File

@@ -1305,6 +1305,8 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
data = BIT(bit + 16);
if (pull == PIN_CONFIG_BIAS_DISABLE)
data |= BIT(bit);
if(pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT)
writel(data, reg);
spin_unlock_irqrestore(&bank->slock, flags);
@@ -1708,7 +1710,34 @@ static int _rockchip_pinconf_set(struct rockchip_pin_bank *bank,
break;
case RK3036:
//to do
switch(config_type)
{
case TYPE_DRV_REG:
if((bank->bank_num == 1) && (pin_num >= 0) && (pin_num <= 3))
{
bit = pin_num*2 + 4;
reg = info->reg_drv;
spin_lock_irqsave(&bank->slock, flags);
data = arg << bit;
data &= (3<<bit);
data |= (3<<(bit+16));
writel_relaxed(data, reg);
spin_unlock_irqrestore(&bank->slock, flags);
}
else
{
printk("%s:RK3036 GPIO%d-%d could not support driver setting\n",__func__, bank->bank_num, pin_num);
}
break;
default:
break;
}
break;
default:
@@ -2033,6 +2062,8 @@ static int rockchip_pinctrl_parse_groups(struct device_node *np,
pull = PIN_CONFIG_BIAS_PULL_DOWN;
else if (val == 3)
pull = PIN_CONFIG_BIAS_BUS_HOLD;
else if (val == 4)
pull = PIN_CONFIG_BIAS_PULL_PIN_DEFAULT;
pinconfig[j++] = pinconf_to_config_packed(pull, val);
}

6
include/dt-bindings/pinctrl/rockchip.h
View File

@@ -89,6 +89,12 @@
#define VALUE_PULL_DOWN 2
#define VALUE_PULL_KEEP 3
#define VALUE_PULL_DISABLE 4 //don't set and keep pull default
#define VALUE_PULL_DEFAULT 4 //don't set and keep pull default
//for rk2928,rk3036
#define VALUE_PULL_UPDOWN_DISABLE 0
#define VALUE_PULL_UPDOWN_ENABLE 1
#define VALUE_VOL_DEFAULT 0
#define VALUE_VOL_3V3 0