shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-04 18:19:28 +09:00
Code Issues Packages Projects Releases Wiki Activity

arm64: dts: qcom: Fix sdhci node names - use 'mmc@'

Browse Source 
Since the Qualcomm sdhci-msm device-tree binding has been converted
to yaml format, 'make dtbs_check' reports issues with
inconsistent 'sdhci@' convention used for specifying the
sdhci nodes. The generic mmc bindings expect 'mmc@' format
instead.

Fix the same.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
[bjorn: Moved non-arm64 changes to separate commit]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220514215424.1007718-2-bhupesh.sharma@linaro.org
This commit is contained in:
Bhupesh Sharma
2022-05-15 03:24:19 +05:30
committed by Bjorn Andersson
parent dd764e1a42
commit 96bb736f05
15 changed files with 24 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm64/boot/dts/qcom/ipq8074.dtsi
View File

@@ -375,7 +375,7 @@
cell-index = <0>;
};
sdhc_1: sdhci@7824900 {
sdhc_1: mmc@7824900 {
compatible = "qcom,sdhci-msm-v4";
reg = <0x7824900 0x500>, <0x7824000 0x800>;
reg-names = "hc_mem", "core_mem";

4
arch/arm64/boot/dts/qcom/msm8916.dtsi
View File

@@ -1464,7 +1464,7 @@
#sound-dai-cells = <1>;
};
sdhc_1: sdhci@7824000 {
sdhc_1: mmc@7824000 {
compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4";
reg = <0x07824900 0x11c>, <0x07824000 0x800>;
reg-names = "hc_mem", "core_mem";
@@ -1482,7 +1482,7 @@
status = "disabled";
};
sdhc_2: sdhci@7864000 {
sdhc_2: mmc@7864000 {
compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4";
reg = <0x07864900 0x11c>, <0x07864000 0x800>;
reg-names = "hc_mem", "core_mem";

4
arch/arm64/boot/dts/qcom/msm8953.dtsi
View File

@@ -795,7 +795,7 @@
};
};
sdhc_1: sdhci@7824900 {
sdhc_1: mmc@7824900 {
compatible = "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4";
reg = <0x7824900 0x500>, <0x7824000 0x800>;
@@ -855,7 +855,7 @@
};
};
sdhc_2: sdhci@7864900 {
sdhc_2: mmc@7864900 {
compatible = "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4";
reg = <0x7864900 0x500>, <0x7864000 0x800>;

4
arch/arm64/boot/dts/qcom/msm8994.dtsi
View File

@@ -461,7 +461,7 @@
};
};
sdhc1: sdhci@f9824900 {
sdhc1: mmc@f9824900 {
compatible = "qcom,msm8994-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
reg-names = "hc_mem", "core_mem";
@@ -484,7 +484,7 @@
status = "disabled";
};
sdhc2: sdhci@f98a4900 {
sdhc2: mmc@f98a4900 {
compatible = "qcom,msm8994-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
reg-names = "hc_mem", "core_mem";

4
arch/arm64/boot/dts/qcom/msm8996.dtsi
View File

@@ -2820,7 +2820,7 @@
status = "disabled";
};
sdhc1: sdhci@7464900 {
sdhc1: mmc@7464900 {
compatible = "qcom,msm8996-sdhci", "qcom,sdhci-msm-v4";
reg = <0x07464900 0x11c>, <0x07464000 0x800>;
reg-names = "hc_mem", "core_mem";
@@ -2844,7 +2844,7 @@
status = "disabled";
};
sdhc2: sdhci@74a4900 {
sdhc2: mmc@74a4900 {
compatible = "qcom,msm8996-sdhci", "qcom,sdhci-msm-v4";
reg = <0x074a4900 0x314>, <0x074a4000 0x800>;
reg-names = "hc_mem", "core_mem";

2
arch/arm64/boot/dts/qcom/msm8998.dtsi
View File

@@ -2075,7 +2075,7 @@
nvmem-cells = <&qusb2_hstx_trim>;
};
sdhc2: sdhci@c0a4900 {
sdhc2: mmc@c0a4900 {
compatible = "qcom,sdhci-msm-v4";
reg = <0x0c0a4900 0x314>, <0x0c0a4000 0x800>;
reg-names = "hc_mem", "core_mem";

2
arch/arm64/boot/dts/qcom/qcs404.dtsi
View File

@@ -806,7 +806,7 @@
status = "disabled";
};
sdcc1: sdcc@7804000 {
sdcc1: mmc@7804000 {
compatible = "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5";
reg = <0x07804000 0x1000>, <0x7805000 0x1000>;
reg-names = "hc", "cqhci";

4
arch/arm64/boot/dts/qcom/sc7180.dtsi
View File

@@ -693,7 +693,7 @@
};
};
sdhc_1: sdhci@7c4000 {
sdhc_1: mmc@7c4000 {
compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5";
reg = <0 0x7c4000 0 0x1000>,
<0 0x07c5000 0 0x1000>;
@@ -2578,7 +2578,7 @@
};
};
sdhc_2: sdhci@8804000 {
sdhc_2: mmc@8804000 {
compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5";
reg = <0 0x08804000 0 0x1000>;

4
arch/arm64/boot/dts/qcom/sc7280.dtsi
View File

@@ -857,7 +857,7 @@
};
};
sdhc_1: sdhci@7c4000 {
sdhc_1: mmc@7c4000 {
compatible = "qcom,sc7280-sdhci", "qcom,sdhci-msm-v5";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_clk>, <&sdc1_cmd>, <&sdc1_data>, <&sdc1_rclk>;
@@ -3028,7 +3028,7 @@
};
};
sdhc_2: sdhci@8804000 {
sdhc_2: mmc@8804000 {
compatible = "qcom,sc7280-sdhci", "qcom,sdhci-msm-v5";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>;

4
arch/arm64/boot/dts/qcom/sdm630.dtsi
View File

@@ -1277,7 +1277,7 @@
status = "disabled";
};
sdhc_2: sdhci@c084000 {
sdhc_2: mmc@c084000 {
compatible = "qcom,sdm630-sdhci", "qcom,sdhci-msm-v5";
reg = <0x0c084000 0x1000>;
reg-names = "hc";
@@ -1327,7 +1327,7 @@
};
};
sdhc_1: sdhci@c0c4000 {
sdhc_1: mmc@c0c4000 {
compatible = "qcom,sdm630-sdhci", "qcom,sdhci-msm-v5";
reg = <0x0c0c4000 0x1000>,
<0x0c0c5000 0x1000>,

2
arch/arm64/boot/dts/qcom/sdm845.dtsi
View File

@@ -3551,7 +3551,7 @@
};
};
sdhc_2: sdhci@8804000 {
sdhc_2: mmc@8804000 {
compatible = "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5";
reg = <0 0x08804000 0 0x1000>;

4
arch/arm64/boot/dts/qcom/sm6125.dtsi
View File

@@ -435,7 +435,7 @@
reg = <0x045f0000 0x7000>;
};
sdhc_1: sdhci@4744000 {
sdhc_1: mmc@4744000 {
compatible = "qcom,sm6125-sdhci", "qcom,sdhci-msm-v5";
reg = <0x04744000 0x1000>, <0x04745000 0x1000>;
reg-names = "hc", "core";
@@ -456,7 +456,7 @@
status = "disabled";
};
sdhc_2: sdhci@4784000 {
sdhc_2: mmc@4784000 {
compatible = "qcom,sm6125-sdhci", "qcom,sdhci-msm-v5";
reg = <0x04784000 0x1000>;
reg-names = "hc";

4
arch/arm64/boot/dts/qcom/sm6350.dtsi
View File

@@ -472,7 +472,7 @@
clock-names = "core";
};
sdhc_1: sdhci@7c4000 {
sdhc_1: mmc@7c4000 {
compatible = "qcom,sm6350-sdhci", "qcom,sdhci-msm-v5";
reg = <0 0x007c4000 0 0x1000>,
<0 0x007c5000 0 0x1000>,
@@ -921,7 +921,7 @@
};
};
sdhc_2: sdhci@8804000 {
sdhc_2: mmc@8804000 {
compatible = "qcom,sm6350-sdhci", "qcom,sdhci-msm-v5";
reg = <0 0x08804000 0 0x1000>;

2
arch/arm64/boot/dts/qcom/sm8150.dtsi
View File

@@ -3543,7 +3543,7 @@
};
};
sdhc_2: sdhci@8804000 {
sdhc_2: mmc@8804000 {
compatible = "qcom,sm8150-sdhci", "qcom,sdhci-msm-v5";
reg = <0 0x08804000 0 0x1000>;

2
arch/arm64/boot/dts/qcom/sm8250.dtsi
View File

@@ -2917,7 +2917,7 @@
};
};
sdhc_2: sdhci@8804000 {
sdhc_2: mmc@8804000 {
compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5";
reg = <0 0x08804000 0 0x1000>;