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media: rockchip: rv1106 vicap compatible with sdmmc

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Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Id8bc9ab9cad17b34b4d0288f10b0eff31854e2e9
This commit is contained in:
Zefa Chen
2022-04-14 15:29:33 +08:00
parent 2f5b6d4bb7
commit 97e6a821bb
4 changed files with 59 additions and 22 deletions
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59
drivers/media/platform/rockchip/cif/capture.c
View File

@@ -2546,9 +2546,18 @@ static int rkcif_csi_channel_set_v1(struct rkcif_stream *stream,
rkcif_write_register_or(dev, CIF_REG_MIPI_LVDS_INTEN,
CSI_ALL_ERROR_INTEN_V1);
}
#if IS_ENABLED(CONFIG_CPU_RV1106)
if (channel->id == 1)
rv1106_sdmmc_get_lock();
#endif
rkcif_write_register(dev, get_reg_index_of_id_ctrl1(channel->id),
channel->width | (channel->height << 16));
#if IS_ENABLED(CONFIG_CPU_RV1106)
if (channel->id == 1)
rv1106_sdmmc_put_lock();
#endif
rkcif_write_register(dev, get_reg_index_of_frm0_y_vlw(channel->id),
channel->virtual_width);
@@ -3924,6 +3933,7 @@ static int rkcif_stream_start(struct rkcif_stream *stream, unsigned int mode)
unsigned int dma_en = 0;
int i = 0;
u32 sav_detect = BT656_DETECT_SAV;
u32 reserved = 0;
if (stream->state < RKCIF_STATE_STREAMING) {
stream->frame_idx = 0;
@@ -3938,6 +3948,25 @@ static int rkcif_stream_start(struct rkcif_stream *stream, unsigned int mode)
if ((mode & RKCIF_STREAM_MODE_CAPTURE) == RKCIF_STREAM_MODE_CAPTURE)
stream->dma_en = RKCIF_DMAEN_BY_VICAP;
mbus_flags = mbus->flags;
if ((mbus_flags & CIF_DVP_PCLK_DUAL_EDGE) == CIF_DVP_PCLK_DUAL_EDGE) {
bt1120_edge_mode = (dev->chip_id < CHIP_RK3588_CIF ?
BT1120_CLOCK_DOUBLE_EDGES : BT1120_CLOCK_DOUBLE_EDGES_RK3588);
rkcif_enable_dvp_clk_dual_edge(dev, true);
} else {
bt1120_edge_mode = dev->chip_id < CHIP_RK3588_CIF ?
BT1120_CLOCK_SINGLE_EDGES : BT1120_CLOCK_SINGLE_EDGES_RK3588;
rkcif_enable_dvp_clk_dual_edge(dev, false);
}
if (mbus_flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
rkcif_config_dvp_clk_sampling_edge(dev, RKCIF_CLK_RISING);
else
rkcif_config_dvp_clk_sampling_edge(dev, RKCIF_CLK_FALLING);
#if IS_ENABLED(CONFIG_CPU_RV1106)
rv1106_sdmmc_get_lock();
#endif
if (sensor_info->sd && mbus->type == V4L2_MBUS_BT656) {
int ret;
@@ -3967,22 +3996,6 @@ static int rkcif_stream_start(struct rkcif_stream *stream, unsigned int mode)
}
}
mbus_flags = mbus->flags;
if ((mbus_flags & CIF_DVP_PCLK_DUAL_EDGE) == CIF_DVP_PCLK_DUAL_EDGE) {
bt1120_edge_mode = (dev->chip_id < CHIP_RK3588_CIF ?
BT1120_CLOCK_DOUBLE_EDGES : BT1120_CLOCK_DOUBLE_EDGES_RK3588);
rkcif_enable_dvp_clk_dual_edge(dev, true);
} else {
bt1120_edge_mode = dev->chip_id < CHIP_RK3588_CIF ?
BT1120_CLOCK_SINGLE_EDGES : BT1120_CLOCK_SINGLE_EDGES_RK3588;
rkcif_enable_dvp_clk_dual_edge(dev, false);
}
if (mbus_flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
rkcif_config_dvp_clk_sampling_edge(dev, RKCIF_CLK_RISING);
else
rkcif_config_dvp_clk_sampling_edge(dev, RKCIF_CLK_FALLING);
href_pol = (mbus_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) ?
HSY_HIGH_ACTIVE : HSY_LOW_ACTIVE;
vsync_pol = (mbus_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) ?
@@ -4111,7 +4124,11 @@ static int rkcif_stream_start(struct rkcif_stream *stream, unsigned int mode)
rkcif_write_register(dev, CIF_REG_DVP_LINE_INT_NUM, 0x1);
rkcif_write_register_or(dev, CIF_REG_DVP_INTEN, LINE_INT_EN);
} else {
rkcif_write_register(dev, CIF_REG_DVP_INTSTAT, 0x3c3ffff);
if (dev->chip_id == CHIP_RV1106_CIF)
reserved = 0xfc3c0000;
else
reserved = 0;
rkcif_write_register(dev, CIF_REG_DVP_INTSTAT, 0x3c3ffff | reserved);
rkcif_write_register_or(dev, CIF_REG_DVP_INTEN, 0x033ffff);//0x3c3ffff
}
@@ -4179,7 +4196,9 @@ static int rkcif_stream_start(struct rkcif_stream *stream, unsigned int mode)
rkcif_write_register(dev, CIF_REG_DVP_CTRL,
AXI_BURST_16 | workmode | ENABLE_CAPTURE);
}
#if IS_ENABLED(CONFIG_CPU_RV1106)
rv1106_sdmmc_put_lock();
#endif
atomic_set(&sof_sd->frm_sync_seq, 0);
stream->state = RKCIF_STATE_STREAMING;
stream->cifdev->dvp_sof_in_oneframe = 0;
@@ -7764,12 +7783,10 @@ unsigned int rkcif_irq_global(struct rkcif_device *cif_dev)
unsigned int intstat_glb = 0;
intstat_glb = rkcif_read_register(cif_dev, CIF_REG_GLB_INTST);
if (intstat_glb) {
rkcif_write_register(cif_dev, CIF_REG_GLB_INTST, intstat_glb);
if (intstat_glb)
v4l2_dbg(1, rkcif_debug, &cif_dev->v4l2_dev,
"intstat_glb 0x%x\n",
intstat_glb);
}
if (intstat_glb & SCALE_TOISP_AXI0_ERR) {
v4l2_err(&cif_dev->v4l2_dev,

4
drivers/media/platform/rockchip/cif/dev.h
View File

@@ -26,6 +26,10 @@
#include "hw.h"
#include "subdev-itf.h"
#if IS_ENABLED(CONFIG_CPU_RV1106)
#include <linux/soc/rockchip/rk_sdmmc.h>
#endif
#define CIF_DRIVER_NAME "rkcif"
#define CIF_VIDEODEVICE_NAME "stream_cif"

6
drivers/media/platform/rockchip/cif/hw.c
View File

@@ -1038,8 +1038,12 @@ static irqreturn_t rkcif_irq_handler(int irq, void *ctx)
unsigned int intstat_glb = 0;
int i;
if (cif_hw->chip_id >= CHIP_RK3588_CIF)
if (cif_hw->chip_id >= CHIP_RK3588_CIF) {
intstat_glb = rkcif_irq_global(cif_hw->cif_dev[0]);
if (intstat_glb)
rkcif_write_register(cif_hw->cif_dev[0], CIF_REG_GLB_INTST, intstat_glb);
}
for (i = 0; i < cif_hw->dev_num; i++) {
if (cif_hw->cif_dev[i]->isr_hdl) {
cif_hw->cif_dev[i]->isr_hdl(irq, cif_hw->cif_dev[i]);

12
drivers/media/platform/rockchip/cif/subdev-itf.c
View File

@@ -425,10 +425,16 @@ static int sditf_channel_enable(struct sditf_priv *priv, int user)
return -EINVAL;
}
}
#if IS_ENABLED(CONFIG_CPU_RV1106)
rv1106_sdmmc_get_lock();
#endif
if (rkcif_debug == 3)
rkcif_write_register_or(cif_dev, CIF_REG_GLB_INTEN, int_en);
else
rkcif_write_register_and(cif_dev, CIF_REG_GLB_INTEN, ~int_en);
#if IS_ENABLED(CONFIG_CPU_RV1106)
rv1106_sdmmc_put_lock();
#endif
return 0;
}
@@ -453,7 +459,13 @@ static void sditf_channel_disable(struct sditf_priv *priv, int user)
else
ctrl_val = CIF_TOISP1_FE(0) | CIF_TOISP1_FE(1) | CIF_TOISP1_FE(2);
}
#if IS_ENABLED(CONFIG_CPU_RV1106)
rv1106_sdmmc_get_lock();
#endif
rkcif_write_register_or(cif_dev, CIF_REG_GLB_INTEN, ctrl_val);
#if IS_ENABLED(CONFIG_CPU_RV1106)
rv1106_sdmmc_put_lock();
#endif
priv->toisp_inf.ch_info[0].is_valid = false;
priv->toisp_inf.ch_info[1].is_valid = false;
priv->toisp_inf.ch_info[2].is_valid = false;