ODROID-M1S: dtb/dtbo: Add odroidm1s dtb overlays

Signed-off-by: Steve Jeong <steve@how2flow.net>
Change-Id: I4b2146e4e8a1800d6112ccbce5997a0b874f0aaf

arch/arm64/boot/dts/rockchip/Makefile

@@ -212,3 +212,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-odroid-m1.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-odroid-m1s.dtb
 
 subdir-$(CONFIG_ARCH_ROCKCHIP_ODROIDM1) += overlays/odroidm1
+subdir-$(CONFIG_ARCH_ROCKCHIP_ODROIDM1) += overlays/odroidm1s

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/Makefile

@@ -0,0 +1,26 @@
+# Overlays for the Odroid platform
+
+dtbo-$(CONFIG_ARCH_ROCKCHIP_ODROIDM1) += \
+	blueled_off.dtbo \
+	dht11.dtbo \
+	hktft32.dtbo \
+	i2c0.dtbo \
+	i2c1.dtbo \
+	mcp2515.dtbo \
+	mcp2515_12mhz.dtbo \
+	mcp2515_16mhz.dtbo \
+	onewire.dtbo \
+	ov5647.dtbo \
+	pcf8563.dtbo \
+	pwm1.dtbo \
+	pwm2.dtbo \
+	pwm3.dtbo \
+	rknpu.dtbo \
+	spi0.dtbo \
+	ttyfiq0_115200.dtbo \
+	uart0-with-ctsrts.dtbo \
+	uart0.dtbo \
+	uart1.dtbo
+
+targets += $(dtbo-y)
+always := $(dtbo-y)

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/blueled_off.dts

@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&work_led>;
+
+		__overlay__ {
+			linux,default-trigger = "off";
+		};
+	};
+};
+

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/dht11.dts

@@ -0,0 +1,19 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+	fragment@0 {
+		target-path = "/";
+
+		__overlay__ {
+				humidity_sensor {
+					compatible = "dht11";
+					gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
+					status = "okay";
+			};
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/hktft32.dts

@@ -0,0 +1,54 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/{
+	fragment@0 {
+		target = <&spi1>;
+
+		__overlay__ {
+			status = "okay";
+
+			num_chipselect = <2>;
+			cs-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>,
+			           <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			hktft32: hktft32@0 {
+				status = "okay";
+				compatible = "hardkernel,hktft32";
+				reg = <0>;
+				spi-max-frequency = <40000000>;
+				rotation = <90>;
+				reset-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
+				dc-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
+			};
+
+			ads7846: ads7846@1 {
+				status = "okay";
+				compatible = "ti,ads7846";
+
+				spi-max-frequency = <2000000>;
+				reg = <1>;
+
+				interrupt-parent = <&gpio0>;
+				interrupts = <RK_PC0 0>;
+				pendown-gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
+
+				ti,swap-xy = <1>;
+				ti,x-min = /bits/ 16 <0>;
+				ti,x-max = /bits/ 16 <8000>;
+				ti,y-min = /bits/ 16 <0>;
+				ti,y-max = /bits/ 16 <4800>;
+				ti,x-plate-ohms = /bits/ 16 <40>;
+				ti,pressure-max = /bits/ 16 <255>;
+
+				linux,wakeup;
+			};
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/i2c0.dts

@@ -0,0 +1,12 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&i2c3>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/i2c1.dts

@@ -0,0 +1,12 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&i2c1>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/mcp2515.dts

@@ -0,0 +1,14 @@
+/dts-v1/;
+/plugin/;
+
+#include "mcp2515.dtsi"
+
+/ {
+	fragment@1 {
+		__overlay__ {
+			can0_clk: can0_clk {
+				clock-frequency = <8000000>;
+			};
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/mcp2515.dtsi

@@ -0,0 +1,52 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+	fragment@0 {
+		target = <&spi1>;
+
+		__overlay__ {
+			num_chipselect = <1>;
+			cs-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	fragment@1 {
+		target-path = "/";
+
+		__overlay__ {
+			can0_clk: can0_clk {
+				compatible = "fixed-clock";
+				#clock-cells = <0>;
+				clock-frequency = <8000000>;
+			};
+		};
+	};
+
+	fragment@2 {
+		target = <&spi1>;
+
+		__overlay__ {
+			/* needed to avoid dtc warning */
+			status = "okay";
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			mcp2515: can@0 {
+				compatible = "microchip,mcp2515";
+				pinctrl-names = "default";
+				pinctrl-0 = <&mcp2515_int_pins>;
+				reg = <0>;
+				clocks = <&can0_clk>;
+				interrupt-parent = <&gpio0>;
+				interrupts = <RK_PC0 IRQ_TYPE_EDGE_FALLING>;
+				spi-max-frequency = <10000000>;
+				status = "okay";
+			};
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/mcp2515_12mhz.dts

@@ -0,0 +1,14 @@
+/dts-v1/;
+/plugin/;
+
+#include "mcp2515.dtsi"
+
+/ {
+	fragment@1 {
+		__overlay__ {
+			can0_clk: can0_clk {
+				clock-frequency = <12000000>;
+			};
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/mcp2515_16mhz.dts

@@ -0,0 +1,14 @@
+/dts-v1/;
+/plugin/;
+
+#include "mcp2515.dtsi"
+
+/ {
+	fragment@1 {
+		__overlay__ {
+			can0_clk: can0_clk {
+				clock-frequency = <16000000>;
+			};
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/onewire.dts

@@ -0,0 +1,19 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+	fragment@0 {
+		target-path = "/";
+
+		__overlay__ {
+				onewire:onewire {
+					compatible = "w1-gpio";
+					gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
+					status = "okay";
+			};
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/ov5647.dts

@@ -0,0 +1,151 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/rk3568-cru.h>
+#include <dt-bindings/power/rk3568-power.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+	fragment@0 {
+		target = <&csi2_dphy_hw>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@1 {
+		target = <&csi2_dphy0>;
+
+		__overlay__ {
+			status = "okay";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				port@0 {
+					reg = <0>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					mipi_in_ucam2: endpoint@0 {
+						reg = <0>;
+						remote-endpoint = <&ov5647_out>;
+						data-lanes = <1 2>;
+					};
+				};
+				port@1 {
+					reg = <1>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					csidphy_out: endpoint@0 {
+						reg = <0>;
+						remote-endpoint = <&isp0_in>;
+					};
+				};
+			};
+		};
+	};
+
+	fragment@2 {
+		target = <&rkisp>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@3 {
+		target = <&rkisp_mmu>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@4 {
+		target = <&rkisp_vir0>;
+
+		__overlay__ {
+			status = "okay";
+
+			port {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				isp0_in: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&csidphy_out>;
+				};
+			};
+		};
+	};
+
+	fragment@5 {
+		target = <&pinctrl>;
+
+		__overlay__ {
+			camif {
+				cam_pwdn: cam-pwdn {
+					rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+				};
+			};
+		};
+	};
+
+	fragment@6 {
+		// i2c2, i2c@fe5b0000
+		target = <&i2c2>;
+
+		__overlay__ {
+			status = "okay";
+
+			ov5647: ov5647@36 {
+				status = "okay";
+				compatible = "ovti,ov5647";
+				reg = <0x36>;
+				clocks = <&pmucru CLK_WIFI>;
+				clock-names = "xvclk";
+				power-domains = <&power RK3568_PD_VI>;
+				pinctrl-names = "default";
+
+				rockchip,camera-module-index = <0>;
+				rockchip,camera-module-facing = "back";
+				rockchip,camera-module-name = "TongJu";
+				rockchip,camera-module-lens-name = "CHT842-MD";
+
+				port {
+					ov5647_out: endpoint {
+						remote-endpoint = <&mipi_in_ucam2>;
+						data-lanes = <1 2>;
+						clock-lanes = <0>;
+						link-frequencies =
+							/bits/ 64 <150000000>;
+					};
+				};
+			};
+		};
+	};
+
+	fragment@7 {
+		target-path = "/";
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		__overlay__ {
+			vcc_cam: vcc-camera {
+				compatible = "regulator-fixed";
+				regulator-name = "vcc_cam";
+				pinctrl-names = "default";
+				pinctrl-0 = <&cam_pwdn>;
+				enable-active-high;
+				gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
+				regulator-always-on;
+				regulator-boot-on;
+			};
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/pcf8563.dts

@@ -0,0 +1,20 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		// i2c3 aliased with i2c0.
+		// This activates i2c3 but it will be named as i2c0 on the userspace.
+		target = <&i2c3>;
+
+		__overlay__ {
+			status = "okay";
+
+			pcf8563: rtc@51 {
+				status = "okay";
+				compatible = "nxp,pcf8563";
+				reg = <0x51>;
+			};
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/pwm1.dts

@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		// pwmchip0, pwm@fdd70010
+		target = <&pwm1>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/pwm2.dts

@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		// pwmchip1, pwm@fdd70020
+		target = <&pwm2>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/pwm3.dts

@@ -0,0 +1,12 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&pwm3>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/rknpu.dts

@@ -0,0 +1,22 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		// npu@fde40000
+		target = <&rknpu>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@1 {
+		// iommu@fde4b000
+		target = <&rknpu_mmu>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/spi0.dts

@@ -0,0 +1,22 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&spi1>;
+
+		__overlay__ {
+			status = "okay";
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			spidev: spidev@0 {
+				status = "okay";
+				compatible = "rockchip,spidev";
+				reg = <0>;
+				/* spi default max clock 100Mhz */
+				spi-max-frequency = <100000000>;
+			};
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/ttyfiq0_115200.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 Hardkernel Co., Ltd.
+ *
+ */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&fiq_debugger>;
+
+		__overlay__ {
+			rockchip,baudrate = <115200>;
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/uart0-with-ctsrts.dts

@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&uart6>;
+
+		__overlay__ {
+			status = "okay";
+			pinctrl-names = "not_use_it", "default";
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/uart0.dts

@@ -0,0 +1,12 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&uart6>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/odroidm1s/uart1.dts

@@ -0,0 +1,14 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&uart0>;
+
+		__overlay__ {
+			status = "okay";
+
+			dma-names = "tx", "rx";
+		};
+	};
+};