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phy: rockchip: inno-hdmi: Subdivide rk3528 phy cfg table

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Add phy configuration of tmds clk corresponding to 10-bit color
depth at different resolutions (such as 1080p60 10-bit).

Change-Id: I8792d950dca2a51572314359044c2bea437a71a8
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
This commit is contained in:
Algea Cao
2025-05-26 09:36:21 +08:00
committed by Tao Huang
parent 4f7e1db593
commit 98c569358a
1 changed files with 19 additions and 18 deletions
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37
drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c
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@@ -347,17 +347,27 @@ static const struct phy_config rk3328_phy_cfg[] = {
static const struct phy_config rk3528_phy_cfg[] = {
/* tmdsclk bias-clk bias-data voltage-clk voltage-data pre-emphasis-data */
{ 165000000, {
0x03, 0x04, 0x0c, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00,
0x02, 0x04, 0x0f, 0x0f, 0x00, 0x76, 0x83, 0x0a, 0x0a,
0x00, 0x00, 0x00, 0x00, 0x00,
},
}, {
185625000, {
0x02, 0x0b, 0x0f, 0x0f, 0x00, 0x76, 0x83, 0x0a, 0x33,
0x00, 0x00, 0x00, 0x00, 0x00,
},
}, {
340000000, {
0x03, 0x04, 0x0c, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00,
0x03, 0x04, 0x0c, 0x12, 0x00, 0x76, 0x83, 0x00, 0x0f,
0x00, 0x00, 0x00, 0x00, 0x00,
},
}, {
371250000, {
0x02, 0x0b, 0x0d, 0x18, 0x00, 0x76, 0x83, 0x0a, 0x33,
0x00, 0x00, 0x00, 0x00, 0x00,
},
}, {
594000000, {
0x02, 0x08, 0x0d, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00,
0x02, 0x0b, 0x0d, 0x18, 0x00, 0x76, 0x83, 0x0a, 0x33,
0x00, 0x00, 0x00, 0x00, 0x00,
},
}, {
@@ -1182,21 +1192,12 @@ inno_hdmi_phy_rk3528_power_on(struct inno_hdmi_phy *inno,
}
/* set termination resistance */
if (phy_cfg->tmdsclock > 340000000) {
inno_write(inno, 0xc7, 0x76);
inno_write(inno, 0xc5, 0x83);
inno_write(inno, 0xc8, 0x00);
inno_write(inno, 0xc9, 0x2f);
inno_write(inno, 0xca, 0x2f);
inno_write(inno, 0xcb, 0x2f);
} else {
inno_write(inno, 0xc7, 0x76);
inno_write(inno, 0xc5, 0x83);
inno_write(inno, 0xc8, 0x00);
inno_write(inno, 0xc9, 0x0f);
inno_write(inno, 0xca, 0x0f);
inno_write(inno, 0xcb, 0x0f);
}
inno_write(inno, 0xc7, phy_cfg->regs[5]);
inno_write(inno, 0xc5, phy_cfg->regs[6]);
inno_write(inno, 0xc8, phy_cfg->regs[7]);
inno_write(inno, 0xc9, phy_cfg->regs[8]);
inno_write(inno, 0xca, phy_cfg->regs[8]);
inno_write(inno, 0xcb, phy_cfg->regs[8]);
/* set TMDS sync detection counter length */
temp = 47520000000;