media: rockchip: vicap limit virtual width at least 8 aligned

Change-Id: I108f4cb48ebd4a2ced7e39f71aa71044367e387e
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
This commit is contained in:
Zefa Chen
2025-07-24 14:20:24 +08:00
committed by Tao Huang
parent 574be18603
commit 996336689c

View File

@@ -8924,7 +8924,8 @@ int rkcif_set_fmt(struct rkcif_stream *stream,
bpl = ALIGN(width * fmt->raw_bpp / 8, 256);
} else {
bpp = rkcif_align_bits_per_pixel(stream, fmt, i);
bpl = width * bpp / CIF_YUV_STORED_BIT_WIDTH;
bpl = ALIGN(width * bpp / CIF_YUV_STORED_BIT_WIDTH, 8);
}
}
if (dev->chip_id > CHIP_RK3562_CIF && stream->sw_dbg_en)