ARM64: dts: rockchip: rk3366: mark xin32k clk as fixed clk

Change-Id: Ic9a6167e389f39bc93fd6214b8fe07ef30dea7da
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
Elaine Zhang
2018-05-18 15:59:49 +08:00
parent 7b06728ef9
commit 9b3c02ff75
2 changed files with 16 additions and 2 deletions

View File

@@ -349,6 +349,13 @@
regulator-boot-on;
};
xin32k: xin32k {
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-output-names = "xin32k";
#clock-cells = <0>;
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rk818 1>;
@@ -454,7 +461,7 @@
compatible = "rockchip,rk818";
status = "okay";
reg = <0x1c>;
clock-output-names = "xin32k", "wifibt_32kin";
clock-output-names = "rk818-clkout1", "wifibt_32kin";
interrupt-parent = <&gpio0>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";

View File

@@ -243,6 +243,13 @@
regulator-boot-on;
};
xin32k: xin32k {
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-output-names = "xin32k";
#clock-cells = <0>;
};
io-domains {
compatible = "rockchip,rk3366-io-voltage-domain";
rockchip,grf = <&grf>;
@@ -453,7 +460,7 @@
compatible = "rockchip,rk818";
status = "okay";
reg = <0x1c>;
clock-output-names = "xin32k", "wifibt_32kin";
clock-output-names = "rk818-clkout1", "wifibt_32kin";
interrupt-parent = <&gpio0>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";