arm64: dts: rockchip: add linestate check dis quirk for rk3399 dwc3

rk3399 dwc3 has a problem that USB 2.0 MAC lineState not
reflect the expected line state (J) during transmission.
Add this quirk to add the ipgap between (tkn to tkn/data)
with 40 bit times of TXENDDELAY, and linestate is ignored
during this 40 bit times delay.

Change-Id: Ife9d46dbf2a8d4a8faa2fc20bfad442d6bb88a05
Signed-off-by: William Wu <william.wu@rock-chips.com>
This commit is contained in:
William Wu
2017-04-18 16:14:58 +08:00
committed by Huang, Tao
parent 6aff8113be
commit 9be0be74f5

View File

@@ -402,6 +402,7 @@
snps,dis-u2-freeclk-exists-quirk;
snps,dis_u2_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,tx-ipgap-linecheck-dis-quirk;
snps,xhci-slow-suspend-quirk;
status = "disabled";
};
@@ -432,6 +433,7 @@
snps,dis-u2-freeclk-exists-quirk;
snps,dis_u2_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,tx-ipgap-linecheck-dis-quirk;
snps,xhci-slow-suspend-quirk;
status = "disabled";
};