Merge commit '73d20803ec8e83587da510d6d0feeead120c7219'

* commit '73d20803ec8e83587da510d6d0feeead120c7219':
  PCI: rockchip: dw_ep: Reset atu index when PM suspend/resume
  PCI: rockchip: dw_ep: Remove useless vm_flags definition
  PCI: rockchip: dw_ep: Avoid repeated calls to irq and works registration
  drm/bridge: analogix_dp: replace readl()/writel() with analogix_dp_read()/_write() for SSC switch
  video: rockchip: vehicle: add dvp input interlace support
  video: rockchip: vehicle: add input mode and fix yuv input order error for rk3576
  cpufreq: interactive: add attribute for touchboost_freq/duration
  cpufreq: interactive: remove cpu limit of system monitor when touchboost
  soc: rockchip: system_monitor: add function to remove/restore cpu limit
  media: i2c: add os12d40 sensor driver
  include: rk-camera-module: add cmd RKMODULE_GET_BAYER_MODE
  mtd: spi-nor: lock the spinor for shutdown progress
  mtd: spi-nor: Add SNOR_F_NO_READ_CR warning
  mtd: spi-nor: winbond: Remove all devices SNOR_F_NO_READ_CR flags
  media: i2c: add imx678 sensor driver
  mfd: display-serdes: fix kmemleak warning from kasprintf
  arm64: configs: rv1126b: add robot config fragment
  media: i2c: add ox03c10 sensor driver

Change-Id: I11d0fbd536941a197bd2ef7c4dce3533274088e9

Conflicts:
	drivers/pci/controller/dwc/pcie-dw-ep-rockchip.c

arch/arm64/configs/rv1126b_robot.config

@@ -0,0 +1,62 @@
+# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
+# CONFIG_BATTERY_RK817 is not set
+CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+# CONFIG_CHARGER_RK817 is not set
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set
+CONFIG_PREEMPT=y
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_RK_HEADSET is not set
+# CONFIG_ROCKCHIP_DW_MIPI_DSI is not set
+# CONFIG_ROCKCHIP_FEPHY is not set
+# CONFIG_ROCKCHIP_MINI_KERNEL is not set
+# CONFIG_ROCKCHIP_MPP_OSAL is not set
+CONFIG_ROCKCHIP_MPP_SERVICE=y
+# CONFIG_ROCKCHIP_RGB is not set
+CONFIG_SQUASHFS=y
+# CONFIG_STMMAC_ETH is not set
+# CONFIG_USB_VIDEO_CLASS is not set
+# CONFIG_VIDEO_IMX415 is not set
+CONFIG_VIDEO_OV7251=y
+# CONFIG_VIDEO_SC200AI is not set
+# CONFIG_VIDEO_SC850SL is not set
+# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_HDMI=y
+CONFIG_I2C_ALGOBIT=y
+CONFIG_LZ4_DECOMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_PREEMPTION=y
+CONFIG_PREEMPT_BUILD=y
+CONFIG_PREEMPT_COUNT=y
+CONFIG_PREEMPT_RCU=y
+# CONFIG_ROCKCHIP_MPP_AV1DEC is not set
+# CONFIG_ROCKCHIP_MPP_IEP2 is not set
+# CONFIG_ROCKCHIP_MPP_JPGDEC is not set
+# CONFIG_ROCKCHIP_MPP_JPGENC is not set
+CONFIG_ROCKCHIP_MPP_PROC_FS=y
+# CONFIG_ROCKCHIP_MPP_RKVDEC is not set
+CONFIG_ROCKCHIP_MPP_RKVDEC2=y
+# CONFIG_ROCKCHIP_MPP_RKVENC is not set
+CONFIG_ROCKCHIP_MPP_RKVENC2=y
+# CONFIG_ROCKCHIP_MPP_VDPP is not set
+# CONFIG_ROCKCHIP_MPP_VDPU1 is not set
+# CONFIG_ROCKCHIP_MPP_VDPU2 is not set
+# CONFIG_ROCKCHIP_MPP_VEPU1 is not set
+# CONFIG_ROCKCHIP_MPP_VEPU2 is not set
+# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set
+# CONFIG_SQUASHFS_DECOMP_MULTI is not set
+CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
+# CONFIG_SQUASHFS_DECOMP_SINGLE is not set
+# CONFIG_SQUASHFS_EMBEDDED is not set
+CONFIG_SQUASHFS_FILE_CACHE=y
+# CONFIG_SQUASHFS_FILE_DIRECT is not set
+CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
+CONFIG_SQUASHFS_LZ4=y
+CONFIG_SQUASHFS_LZO=y
+# CONFIG_SQUASHFS_XATTR is not set
+# CONFIG_SQUASHFS_XZ is not set
+CONFIG_SQUASHFS_ZLIB=y
+# CONFIG_SQUASHFS_ZSTD is not set
+CONFIG_UNINLINE_SPIN_UNLOCK=y

drivers/cpufreq/cpufreq_interactive.c

@@ -37,6 +37,7 @@
 #include <linux/slab.h>
 #include <uapi/linux/sched/types.h>
 #include <linux/sched/clock.h>
+#include <soc/rockchip/rockchip_system_monitor.h>
 
 #define CREATE_TRACE_POINTS
 #include <trace/events/cpufreq_interactive.h>
@@ -100,6 +101,7 @@ struct interactive_tunables {
 	int touchboostpulse_duration_val;
 	/* End time of touchboost pulse in ktime converted to usecs */
 	u64 touchboostpulse_endtime;
+	bool touchboost, is_touchboosted;
 #endif
 	bool boosted;
 
@@ -599,7 +601,44 @@ again:
 	for_each_cpu(cpu, &tmp_mask) {
 		struct interactive_cpu *icpu = &per_cpu(interactive_cpu, cpu);
 		struct cpufreq_policy *policy;
+#ifdef CONFIG_ARCH_ROCKCHIP
+		struct interactive_tunables *tunables;
+		bool update_policy = false;
+		u64 now;
 
+		now = ktime_to_us(ktime_get());
+		if (!down_read_trylock(&icpu->enable_sem))
+			continue;
+
+		if (!icpu->ipolicy) {
+			up_read(&icpu->enable_sem);
+			continue;
+		}
+
+		tunables = icpu->ipolicy->tunables;
+		if (!tunables) {
+			up_read(&icpu->enable_sem);
+			continue;
+		}
+
+		if (tunables->touchboost &&
+		    now > tunables->touchboostpulse_endtime) {
+			tunables->touchboost = false;
+			rockchip_monitor_restore_cpu_limit(cpu);
+			update_policy = true;
+		}
+
+		if (!tunables->is_touchboosted && tunables->touchboost) {
+			rockchip_monitor_remove_cpu_limit(cpu);
+			update_policy = true;
+		}
+
+		tunables->is_touchboosted = tunables->touchboost;
+
+		up_read(&icpu->enable_sem);
+		if (update_policy)
+			cpufreq_update_policy(cpu);
+#endif
 		policy = cpufreq_cpu_get(cpu);
 		if (!policy)
 			continue;
@@ -1011,6 +1050,44 @@ static ssize_t store_io_is_busy(struct gov_attr_set *attr_set, const char *buf,
 	return count;
 }
 
+static ssize_t store_touchboost_freq(struct gov_attr_set *attr_set,
+				     const char *buf, size_t count)
+{
+	struct interactive_tunables *tunables = to_tunables(attr_set);
+	unsigned long val;
+	int ret;
+
+	ret = kstrtoul(buf, 0, &val);
+	if (ret < 0)
+		return ret;
+
+	tunables->touchboost_freq = val;
+
+	return count;
+}
+
+static ssize_t show_touchboost_duration(struct gov_attr_set *attr_set, char *buf)
+{
+	struct interactive_tunables *tunables = to_tunables(attr_set);
+
+	return sprintf(buf, "%d\n", tunables->touchboostpulse_duration_val);
+}
+
+static ssize_t store_touchboost_duration(struct gov_attr_set *attr_set,
+					 const char *buf, size_t count)
+{
+	struct interactive_tunables *tunables = to_tunables(attr_set);
+	int val, ret;
+
+	ret = kstrtoint(buf, 0, &val);
+	if (ret < 0)
+		return ret;
+
+	tunables->touchboostpulse_duration_val = val;
+
+	return count;
+}
+
 show_one(hispeed_freq, "%u");
 show_one(go_hispeed_load, "%lu");
 show_one(min_sample_time, "%lu");
@@ -1018,6 +1095,7 @@ show_one(timer_slack, "%lu");
 show_one(boost, "%u");
 show_one(boostpulse_duration, "%u");
 show_one(io_is_busy, "%u");
+show_one(touchboost_freq, "%lu");
 
 gov_attr_rw(target_loads);
 gov_attr_rw(above_hispeed_delay);
@@ -1030,6 +1108,8 @@ gov_attr_rw(boost);
 gov_attr_wo(boostpulse);
 gov_attr_rw(boostpulse_duration);
 gov_attr_rw(io_is_busy);
+gov_attr_rw(touchboost_freq);
+gov_attr_rw(touchboost_duration);
 
 static struct attribute *interactive_attrs[] = {
 	&target_loads.attr,
@@ -1043,6 +1123,8 @@ static struct attribute *interactive_attrs[] = {
 	&boostpulse.attr,
 	&boostpulse_duration.attr,
 	&io_is_busy.attr,
+	&touchboost_freq.attr,
+	&touchboost_duration.attr,
 	NULL
 };
 ATTRIBUTE_GROUPS(interactive);
@@ -1242,6 +1324,7 @@ static void cpufreq_interactive_input_event(struct input_handle *handle,
 			cpumask_set_cpu(i, &speedchange_cpumask);
 			pcpu->loc_hispeed_val_time =
 					ktime_to_us(ktime_get());
+			tunables->touchboost = true;
 			anyboost = 1;
 		}
 
@@ -1475,6 +1558,10 @@ static void cpufreq_interactive_exit(struct cpufreq_policy *policy)
 		idle_notifier_unregister(&cpufreq_interactive_idle_nb);
 #ifdef CONFIG_ARCH_ROCKCHIP
 		input_unregister_handler(&cpufreq_interactive_input_handler);
+		if (tunables->touchboost) {
+			tunables->touchboost = false;
+			rockchip_monitor_restore_cpu_limit(policy->cpu);
+		}
 #endif
 	}
 

drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c

@@ -532,25 +532,25 @@ static void analogix_dp_ssc_enable(struct analogix_dp_device *dp)
 	u32 reg;
 
 	/* 4500ppm */
-	writel(0x19, dp->reg_base + ANALOIGX_DP_SSC_REG);
+	analogix_dp_write(dp, ANALOIGX_DP_SSC_REG, 0x19);
 	/*
 	 * To apply updated SSC parameters into SSC operation,
 	 * firmware must disable and enable this bit.
 	 */
-	reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_FUNC_EN_2);
 	reg |= SSC_FUNC_EN_N;
-	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+	analogix_dp_write(dp, ANALOGIX_DP_FUNC_EN_2, reg);
 	reg &= ~SSC_FUNC_EN_N;
-	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+	analogix_dp_write(dp, ANALOGIX_DP_FUNC_EN_2, reg);
 }
 
 static void analogix_dp_ssc_disable(struct analogix_dp_device *dp)
 {
 	u32 reg;
 
-	reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+	reg = analogix_dp_read(dp, ANALOGIX_DP_FUNC_EN_2);
 	reg |= SSC_FUNC_EN_N;
-	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+	analogix_dp_write(dp, ANALOGIX_DP_FUNC_EN_2, reg);
 }
 
 bool analogix_dp_ssc_supported(struct analogix_dp_device *dp)

drivers/media/i2c/Kconfig

@@ -850,6 +850,19 @@ config VIDEO_IMX586
 	  To compile this driver as a module, choose M here: the
 	  module will be called imx586.
 
+config VIDEO_IMX678
+	tristate "Sony IMX678 sensor support"
+	depends on I2C && VIDEO_DEV
+	depends on MEDIA_CAMERA_SUPPORT
+	select MEDIA_CONTROLLER
+	select VIDEO_V4L2_SUBDEV_API
+	help
+	  This is a Video4Linux2 sensor driver for the Sony
+	  IMX678 camera.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called imx678.
+
 config VIDEO_IMX766
 	tristate "Sony IMX766 sensor support"
 	depends on I2C && VIDEO_DEV
@@ -1151,6 +1164,17 @@ config VIDEO_OS08A20
 	  This is a Video4Linux2 sensor driver for the OmniVision
 	  OS08A20 camera.
 
+config VIDEO_OS12D40
+	tristate "OmniVision OS12D40 sensor support"
+	depends on I2C && VIDEO_DEV
+	depends on MEDIA_CAMERA_SUPPORT
+	select MEDIA_CONTROLLER
+	select VIDEO_V4L2_SUBDEV_API
+	select V4L2_FWNODE
+	help
+	  This is a Video4Linux2 sensor driver for the OmniVision
+	  OS12D40 camera.
+
 config VIDEO_OV02A10
 	tristate "OmniVision OV02A10 sensor support"
 	depends on VIDEO_DEV && I2C
@@ -1676,6 +1700,19 @@ config VIDEO_OV9734
 	  To compile this driver as a module, choose M here: the
 	  module's name is ov9734.
 
+config VIDEO_OX03C10
+	tristate "OmniVision OX03C10 sensor support"
+	depends on VIDEO_DEV && I2C
+	select MEDIA_CONTROLLER
+	select VIDEO_V4L2_SUBDEV_API
+	select V4L2_FWNODE
+	help
+	  This is a Video4Linux2 sensor driver for the OmniVision
+	  OX03C10 camera.
+
+	  To compile this driver as a module, choose M here: the
+	  module's name is OX03C10.
+
 config VIDEO_PREISP_DUMMY_SENSOR
 	tristate "Preisp dummy sensor support"
 	depends on VIDEO_DEV && I2C

drivers/media/i2c/Makefile

@@ -106,6 +106,7 @@ obj-$(CONFIG_VIDEO_IMX492) += imx492.o
 obj-$(CONFIG_VIDEO_IMX498) += imx498.o
 obj-$(CONFIG_VIDEO_IMX577) += imx577.o
 obj-$(CONFIG_VIDEO_IMX586) += imx586.o
+obj-$(CONFIG_VIDEO_IMX678) += imx678.o
 obj-$(CONFIG_VIDEO_IMX766) += imx766.o
 obj-$(CONFIG_VIDEO_IR_I2C) += ir-kbd-i2c.o
 obj-$(CONFIG_VIDEO_ISL7998X) += isl7998x.o
@@ -161,6 +162,7 @@ obj-$(CONFIG_VIDEO_OS04D10) += os04d10.o
 obj-$(CONFIG_VIDEO_OS05A20) += os05a20.o
 obj-$(CONFIG_VIDEO_OS05L10) += os05l10.o
 obj-$(CONFIG_VIDEO_OS08A20) += os08a20.o
+obj-$(CONFIG_VIDEO_OS12D40) += os12d40.o
 obj-$(CONFIG_VIDEO_OTP_EEPROM) += otp_eeprom.o
 obj-$(CONFIG_VIDEO_OV02A10) += ov02a10.o
 obj-$(CONFIG_VIDEO_OV02B10) += ov02b10.o
@@ -207,6 +209,7 @@ obj-$(CONFIG_VIDEO_OV9282) += ov9282.o
 obj-$(CONFIG_VIDEO_OV9640) += ov9640.o
 obj-$(CONFIG_VIDEO_OV9650) += ov9650.o
 obj-$(CONFIG_VIDEO_OV9734) += ov9734.o
+obj-$(CONFIG_VIDEO_OX03C10) += ox03c10.o
 obj-$(CONFIG_VIDEO_PREISP_DUMMY_SENSOR) += preisp-dummy.o
 obj-$(CONFIG_VIDEO_PS5458) += ps5458.o
 obj-$(CONFIG_VIDEO_RDACM20) += rdacm20.o

drivers/mfd/display-serdes/serdes-gpio.c

@@ -42,10 +42,9 @@ static void serdes_gpio_set(struct gpio_chip *chip, unsigned int offset, int val
 {
 	struct serdes_gpio *serdes_gpio = gpiochip_get_data(chip);
 	struct serdes *serdes = serdes_gpio->parent->parent;
-	int ret = 0;
 
 	if (serdes->chip_data->gpio_ops->set_level)
-		ret = serdes->chip_data->gpio_ops->set_level(serdes, offset, value);
+		serdes->chip_data->gpio_ops->set_level(serdes, offset, value);
 
 	SERDES_DBG_MFD("%s: %s %s gpio=%d,val=%d\n", __func__, dev_name(serdes->dev),
 		       serdes->chip_data->name, offset, value);
@@ -185,7 +184,8 @@ static int serdes_gpio_probe(struct platform_device *pdev)
 #ifdef CONFIG_OF_GPIO
 	serdes_gpio->gpio_chip.of_node = serdes_gpio->dev->of_node;
 #endif
-	serdes_gpio->gpio_chip.label = kasprintf(GFP_KERNEL, "%s-gpio", chip_data->name);
+	serdes_gpio->gpio_chip.label = devm_kasprintf(serdes_gpio->dev, GFP_KERNEL,
+						      "%s-gpio", chip_data->name);
 
 	/* Add gpiochip */
 	ret = devm_gpiochip_add_data(&pdev->dev, &serdes_gpio->gpio_chip,

drivers/mfd/display-serdes/serdes-pinctrl.c

@@ -282,7 +282,7 @@ static int serdes_pinctrl_probe(struct platform_device *pdev)
 	if (pin_base) {
 		for (i = 0; i < pinctrl_info->num_pins; i++) {
 			serdes_pinctrl->pdesc[i].number = pinctrl_info->pins[i].number + pin_base;
-			serdes_pinctrl->pdesc[i].name = kasprintf(GFP_KERNEL, "%s-gpio%d",
+			serdes_pinctrl->pdesc[i].name = devm_kasprintf(dev, GFP_KERNEL, "%s-gpio%d",
 								  pinctrl_info->pins[i].name,
 								  serdes_pinctrl->pdesc[i].number);
 			SERDES_DBG_MFD("%s:pdesc number=%d, name=%s\n", __func__,
@@ -336,7 +336,7 @@ static int serdes_pinctrl_probe(struct platform_device *pdev)
 	}
 
 	if (!serdes->route_enable)
-		ret = pinctrl_enable(serdes_pinctrl->pctl);
+		pinctrl_enable(serdes_pinctrl->pctl);
 
 	ret = serdes_pinctrl_gpio_init(serdes);
 

drivers/mtd/spi-nor/core.c

@@ -1647,8 +1647,10 @@ int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor)
 {
 	int ret;
 
-	if (nor->flags & SNOR_F_NO_READ_CR)
+	if (nor->flags & SNOR_F_NO_READ_CR) {
+		dev_warn(nor->dev, "it is recommended to optimize the SNOR_F_NO_READ_CR!\n");
 		return spi_nor_write_16bit_cr_and_check(nor, SR2_QUAD_EN_BIT1);
+	}
 
 	ret = spi_nor_read_cr(nor, nor->bouncebuf);
 	if (ret)
@@ -3469,6 +3471,7 @@ static void spi_nor_shutdown(struct spi_mem *spimem)
 {
 	struct spi_nor *nor = spi_mem_get_drvdata(spimem);
 
+	mutex_lock(&nor->lock);
 	spi_nor_restore(nor);
 }
 

drivers/mtd/spi-nor/winbond.c

@@ -226,9 +226,19 @@ static void winbond_nor_late_init(struct spi_nor *nor)
 		nor->params->otp.ops = &winbond_nor_otp_ops;
 }
 
+static void winbond_nor_post_sfdp(struct spi_nor *nor)
+{
+	/*
+	 * All winbond flash support 35H command, but some flash do
+	 * not accurately feedback information after SDFP param parsing.
+	 */
+	nor->flags &= ~SNOR_F_NO_READ_CR;
+}
+
 static const struct spi_nor_fixups winbond_nor_fixups = {
 	.default_init = winbond_nor_default_init,
 	.late_init = winbond_nor_late_init,
+	.post_sfdp = winbond_nor_post_sfdp,
 };
 
 const struct spi_nor_manufacturer spi_nor_winbond = {

drivers/pci/controller/dwc/pcie-dw-ep-rockchip.c

@@ -975,13 +975,6 @@ static int rockchip_pcie_config_host(struct rockchip_pcie *rockchip)
 already_linkup:
 	/* Enable client reset or link down interrupt */
 	rockchip_pcie_writel_apb(rockchip, 0x40000, PCIE_CLIENT_INTR_MASK);
-	rockchip->hot_rst_wq = create_singlethread_workqueue("rkep_hot_rst_wq");
-	if (!rockchip->hot_rst_wq) {
-		dev_err(dev, "Failed to create hot_rst workqueue\n");
-		return -ENOMEM;
-	}
-	INIT_WORK(&rockchip->hot_rst_work, rockchip_pcie_hot_rst_work);
-	init_waitqueue_head(&rockchip->wq_head);
 
 	/* Enable client elbi interrupt */
 	rockchip_pcie_writel_apb(rockchip, 0x80000000, PCIE_CLIENT_INTR_MASK);
@@ -995,6 +988,31 @@ already_linkup:
 	dw_pcie_writel_dbi(&rockchip->pci, PCIE_DMA_OFFSET + PCIE_DMA_WR_INT_MASK, 0x0);
 	dw_pcie_writel_dbi(&rockchip->pci, PCIE_DMA_OFFSET + PCIE_DMA_RD_INT_MASK, 0x0);
 
+	/* Setting device */
+	if (dw_pcie_readl_dbi(&rockchip->pci, PCIE_ATU_VIEWPORT) == 0xffffffff)
+		rockchip->pci.iatu_unroll_enabled = 1;
+	memset(rockchip->ib_window_map, 0, BITS_TO_LONGS(rockchip->num_ib_windows) * sizeof(long));
+	memset(rockchip->ob_window_map, 0, BITS_TO_LONGS(rockchip->num_ob_windows) * sizeof(long));
+	for (i = 0; i < PCIE_BAR_MAX_NUM; i++)
+		if (rockchip->ib_target_size[i])
+			rockchip_pcie_ep_set_bar(rockchip, i, rockchip->ib_target_address[i]);
+
+	return 0;
+}
+
+static int rockchip_pcie_config_irq_and_works(struct rockchip_pcie *rockchip)
+{
+	struct device *dev = rockchip->pci.dev;
+	int ret;
+
+	rockchip->hot_rst_wq = create_singlethread_workqueue("rkep_hot_rst_wq");
+	if (!rockchip->hot_rst_wq) {
+		dev_err(dev, "Failed to create hot_rst workqueue\n");
+		return -ENOMEM;
+	}
+	INIT_WORK(&rockchip->hot_rst_work, rockchip_pcie_hot_rst_work);
+	init_waitqueue_head(&rockchip->wq_head);
+
 	ret = devm_request_irq(dev, rockchip->irq, rockchip_pcie_sys_irq_handler,
 			       IRQF_SHARED, "pcie-sys", rockchip);
 	if (ret) {
@@ -1002,12 +1020,6 @@ already_linkup:
 		return ret;
 	}
 
-	/* Setting device */
-	if (dw_pcie_readl_dbi(&rockchip->pci, PCIE_ATU_VIEWPORT) == 0xffffffff)
-		rockchip->pci.iatu_unroll_enabled = 1;
-	for (i = 0; i < PCIE_BAR_MAX_NUM; i++)
-		if (rockchip->ib_target_size[i])
-			rockchip_pcie_ep_set_bar(rockchip, i, rockchip->ib_target_address[i]);
 	rockchip_pcie_devmode_update(rockchip, RKEP_MODE_KERNEL, RKEP_SMODE_LNKUP);
 
 	return 0;
@@ -1315,9 +1327,6 @@ static int pcie_ep_mmap(struct file *file, struct vm_area_struct *vma)
 		return -EINVAL;
 	}
 
-	vm_flags_set(vma, VM_IO);
-	vm_flags_set(vma, VM_DONTEXPAND | VM_DONTDUMP);
-
 	if (rockchip->cur_mmap_res == PCIE_EP_MMAP_RESOURCE_BAR2)
 		vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
 	else
@@ -1400,6 +1409,12 @@ static int rockchip_pcie_ep_probe(struct platform_device *pdev)
 		goto deinit_host;
 	}
 
+	ret = rockchip_pcie_config_irq_and_works(rockchip);
+	if (ret) {
+		dev_err(dev, "Failed to config irq and works\n");
+		goto deinit_host;
+	}
+
 	ret = rockchip_pcie_init_dma_trx(rockchip);
 	if (ret) {
 		dev_err(dev, "Failed to initial dma trx!\n");

drivers/soc/rockchip/rockchip_system_monitor.c

@@ -1131,6 +1131,44 @@ int rockchip_monitor_suspend_low_temp_adjust(int cpu)
 }
 EXPORT_SYMBOL(rockchip_monitor_suspend_low_temp_adjust);
 
+void rockchip_monitor_remove_cpu_limit(int cpu)
+{
+	struct monitor_dev_info *info;
+
+	down_read(&mdev_list_sem);
+	list_for_each_entry(info, &monitor_dev_list, node) {
+		if (info->devp->type != MONITOR_TYPE_CPU)
+			continue;
+		if (cpumask_test_cpu(cpu, &info->devp->allowed_cpus)) {
+			if (info->status_max_limit)
+				freq_qos_update_request(&info->max_sta_freq_req,
+							FREQ_QOS_MAX_DEFAULT_VALUE);
+			break;
+		}
+	}
+	up_read(&mdev_list_sem);
+}
+EXPORT_SYMBOL(rockchip_monitor_remove_cpu_limit);
+
+void rockchip_monitor_restore_cpu_limit(int cpu)
+{
+	struct monitor_dev_info *info;
+
+	down_read(&mdev_list_sem);
+	list_for_each_entry(info, &monitor_dev_list, node) {
+		if (info->devp->type != MONITOR_TYPE_CPU)
+			continue;
+		if (cpumask_test_cpu(cpu, &info->devp->allowed_cpus)) {
+			if (info->status_max_limit)
+				freq_qos_update_request(&info->max_sta_freq_req,
+							info->status_max_limit);
+			break;
+		}
+	}
+	up_read(&mdev_list_sem);
+}
+EXPORT_SYMBOL(rockchip_monitor_restore_cpu_limit);
+
 static int
 rockchip_system_monitor_wide_temp_adjust(struct monitor_dev_info *info,
 					 int temp)

drivers/video/rockchip/vehicle/vehicle_ad_gc2145.c

@@ -849,6 +849,7 @@ static void gc2145_reinit_parameter(struct vehicle_ad_dev *ad, unsigned char cvs
 		ad->cfg.mbus_flags = V4L2_MBUS_HSYNC_ACTIVE_HIGH |
 					V4L2_MBUS_VSYNC_ACTIVE_LOW |
 					V4L2_MBUS_PCLK_SAMPLE_RISING;
+		ad->cfg.input_mode = CIF_INPUT_MODE_BT601_YUV;
 		break;
 	}
 

drivers/video/rockchip/vehicle/vehicle_cfg.h

@@ -38,6 +38,13 @@ enum {
 	CIF_INPUT_FORMAT_NTSC_SW_COMPOSITE = 0xfe000000,
 };
 
+enum {
+	CIF_INPUT_MODE_BT601_YUV = 0,
+	CIF_INPUT_MODE_BT601_RAW = 1,
+	CIF_INPUT_MODE_BT656_YUV = 2,
+	CIF_INPUT_MODE_BT1120_YUV = 3,
+};
+
 enum {
 	CIF_OUTPUT_FORMAT_422 = 0,
 	CIF_OUTPUT_FORMAT_420 = 1,
@@ -163,6 +170,7 @@ struct vehicle_cfg {
 	int rotate_mirror;
 	struct rkmodule_csi_dphy_param *dphy_param;
 	int drop_frames;
+	int input_mode;
 };
 
 #endif

drivers/video/rockchip/vehicle/vehicle_cif.c

@@ -1769,6 +1769,44 @@ static int rkcif_dvp_get_input_yuv_order(struct vehicle_cfg *cfg)
 	return mask;
 }
 
+static int rkcif_dvp_get_input_yuv_order_rk3576(struct vehicle_cfg *cfg)
+{
+	unsigned int mask;
+
+	switch (cfg->mbus_code) {
+	case MEDIA_BUS_FMT_UYVY8_2X8:
+		mask = CSI_YUV_INPUT_ORDER_UYVY;
+		break;
+	case MEDIA_BUS_FMT_VYUY8_2X8:
+		mask = CSI_YUV_INPUT_ORDER_VYUY;
+		break;
+	case MEDIA_BUS_FMT_YUYV8_2X8:
+		mask = CSI_YUV_INPUT_ORDER_YUYV;
+		break;
+	case MEDIA_BUS_FMT_YVYU8_2X8:
+		mask = CSI_YUV_INPUT_ORDER_YVYU;
+		break;
+	default:
+		mask = CSI_YUV_INPUT_ORDER_UYVY;
+		break;
+	}
+	return mask;
+}
+
+static u32 rkcif_determine_input_mode(struct vehicle_cif *cif)
+{
+	struct vehicle_cfg *cfg = &cif->cif_cfg;
+	u32 mode = cfg->input_mode << 2;
+
+	if (cif->chip_id == CHIP_RK3568_VEHICLE_CIF &&
+	   cfg->input_mode == CIF_INPUT_MODE_BT1120_YUV)
+		mode = INPUT_MODE_BT1120;
+	if (cif->chip_id == CHIP_RK3576_VEHICLE_CIF)
+		mode = mode << 2;
+
+	return mode;
+}
+
 static int cif_stream_setup(struct vehicle_cif *cif)
 {
 	struct vehicle_cfg *cfg = &cif->cif_cfg;
@@ -1791,27 +1829,56 @@ static int cif_stream_setup(struct vehicle_cif *cif)
 	else
 		rkvehicle_cif_cfg_dvp_clk_sampling_edge(cif, RKCIF_CLK_FALLING);
 
-	inputmode = cfg->input_format<<2; //INPUT_MODE_YUV or INPUT_MODE_BT656_YUV422
+	inputmode = rkcif_determine_input_mode(cif); //INPUT_MODE_YUV or INPUT_MODE_BT656_YUV422
 	//YUV_INPUT_ORDER_UYVY, MEDIA_BUS_FMT_UYVY8_2X8, CCIR_INPUT_ORDER_ODD
-	input_format = (cfg->yuv_order<<5) | YUV_INPUT_422 | (cfg->field_order<<9);
+
+	input_format = (cfg->yuv_order << 5) | YUV_INPUT_422 | (cfg->field_order << 9);
 	if (cfg->output_format == CIF_OUTPUT_FORMAT_420)
 		output_format = YUV_OUTPUT_420 | UV_STORAGE_ORDER_UVUV;
 	else
 		output_format = YUV_OUTPUT_422 | UV_STORAGE_ORDER_UVUV;
 
 	if (cif->chip_id == CHIP_RK3568_VEHICLE_CIF) {
-		val = cfg->vsync | (cfg->href<<1) | inputmode | mipimode
+		if (cfg->input_format == CIF_INPUT_FORMAT_PAL ||
+		   cfg->input_format == CIF_INPUT_FORMAT_NTSC)
+			xfer_mode = BT1120_TRANSMIT_INTERFACE;
+		else
+			xfer_mode = BT1120_TRANSMIT_PROGRESS;
+	} else if (cif->chip_id == CHIP_RK3588_VEHICLE_CIF) {
+		if (cfg->input_format == CIF_INPUT_FORMAT_PAL ||
+		   cfg->input_format == CIF_INPUT_FORMAT_NTSC)
+			xfer_mode = BT1120_TRANSMIT_INTERFACE_RK3588;
+		else
+			xfer_mode = BT1120_TRANSMIT_PROGRESS_RK3588;
+	} else {
+		if (cfg->input_format == CIF_INPUT_FORMAT_PAL ||
+		   cfg->input_format == CIF_INPUT_FORMAT_NTSC)
+			xfer_mode = BT1120_TRANSMIT_INTERFACE_RK3576;
+		else
+			xfer_mode = BT1120_TRANSMIT_PROGRESS_RK3576;
+	}
+
+	if (cif->chip_id == CHIP_RK3568_VEHICLE_CIF) {
+		val = cfg->vsync | (cfg->href << 1) | inputmode | mipimode
 		   | input_format | output_format
 		   | xfer_mode | yc_swap | multi_id_en
 		   | multi_id_sel | multi_id_mode | bt1120_edge_mode;
-	} else {
+	} else if (cif->chip_id == CHIP_RK3588_VEHICLE_CIF) {
 		out_fmt_mask = (CSI_WRDDR_TYPE_YUV420SP_RK3588 << 11) |
 				(CSI_YUV_OUTPUT_ORDER_UYVY << 1);
 		in_fmt_yuv_order = rkcif_dvp_get_input_yuv_order(cfg);
-		val = cfg->vsync | (cfg->href<<1) | inputmode
-		   | in_fmt_yuv_order | out_fmt_mask
+		val = cfg->vsync | (cfg->href << 1) | inputmode
+		   | in_fmt_yuv_order | out_fmt_mask | xfer_mode
 		   | yc_swap | multi_id_en | multi_id_sel
 		   | sav_detect | multi_id_mode | bt1120_edge_mode;
+	} else {
+		out_fmt_mask = (CSI_WRDDR_TYPE_YUV420SP_RK3588 << 15) |
+				CSI_YUV_OUTPUT_ORDER_UYVY;
+		in_fmt_yuv_order = rkcif_dvp_get_input_yuv_order_rk3576(cfg);
+		val = cfg->vsync | (cfg->href << 1) | inputmode
+		   | in_fmt_yuv_order | out_fmt_mask | xfer_mode
+		   | yc_swap | multi_id_en | multi_id_sel
+		   | multi_id_mode | (bt1120_edge_mode >> 8);
 	}
 
 	if (cif->chip_id >= CHIP_RK3576_VEHICLE_CIF)

include/soc/rockchip/rockchip_system_monitor.h

@@ -151,6 +151,8 @@ int rockchip_monitor_dev_low_temp_adjust(struct monitor_dev_info *info,
 int rockchip_monitor_dev_high_temp_adjust(struct monitor_dev_info *info,
 					  bool is_high);
 int rockchip_monitor_suspend_low_temp_adjust(int cpu);
+void rockchip_monitor_remove_cpu_limit(int cpu);
+void rockchip_monitor_restore_cpu_limit(int cpu);
 int rockchip_system_monitor_register_notifier(struct notifier_block *nb);
 void rockchip_system_monitor_unregister_notifier(struct notifier_block *nb);
 #else
@@ -203,6 +205,14 @@ static inline int rockchip_monitor_suspend_low_temp_adjust(int cpu)
 	return 0;
 };
 
+static inline void rockchip_monitor_remove_cpu_limit(int cpu)
+{
+};
+
+static inline void rockchip_monitor_restore_cpu_limit(int cpu)
+{
+};
+
 static inline int
 rockchip_system_monitor_register_notifier(struct notifier_block *nb)
 {

include/uapi/linux/rk-camera-module.h

@@ -219,6 +219,9 @@
 #define RKMODULE_SET_EXP_MODE       \
 	_IOW('V', BASE_VIDIOC_PRIVATE + 51, __u32)
 
+#define RKMODULE_GET_BAYER_MODE       \
+	_IOR('V', BASE_VIDIOC_PRIVATE + 52, __u32)
+
 struct rkmodule_i2cdev_info {
 	__u8 slave_addr;
 } __attribute__ ((packed));
@@ -956,4 +959,9 @@ struct rkmodule_blc_group {
 	__u32 blc[RKMODULE_MAX_BLC_GROUP];
 };
 
+enum rkmodule_bayer_mode {
+	RKMODULE_NORMAL_BAYER,
+	RKMODULE_QUARD_BAYER,
+};
+
 #endif /* _UAPI_RKMODULE_CAMERA_H */