arm64: dts: rockchip: Add rv1126b-thunder-boot for SPI Nor/eMMC

rv1126b thunderboot reserved memory layout:

  H
		 _______________________
		|			|
		|	ramdisk_c	|
		|_______________________|
		|			|
		|	ramdisk_r	|
 0x48c40000	|_______________________|
		|			|
		|        mcu_log	|
 0x48c3c000	|_______________________|
		|			|
		|         mcu		|
 0x48c00000	|_______________________|
		|			|
		|     [TEEOS+TA+SHM]	|
 0x48400000	|_______________________|
		|			|
		|	mmc_escd	|
 0x48000000	|_______________________|
		|			|
		|	mmc_idmac	|
 0x47fffe00	|_______________________|
		|			|
		|    isp[0..1]_tb_rmem	|
		|_______________________|
		|			|
		|         meta		|
 0x41240000	|_______________________|
		|			|
		|	   fdt		|
 0x41200000	|_______________________|
		|			|
		|	kernel_r	|
 0x40208000	|_______________________|
		|			|
		|	   bl31		|
 L		|_______________________|

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I69f4dcbf94d6a646794e993ad7dac0e94028ed47
This commit is contained in:
Ziyuan Xu
2025-05-27 10:19:25 +08:00
committed by Weiwen Chen
parent 7cd68dc911
commit 9d3d119972
3 changed files with 143 additions and 0 deletions

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2025 Rockchip Electronics Co., Ltd.
*/
#include "rv1126b-thunder-boot.dtsi"
/ {
thunder_boot_mmc: thunder-boot-mmc {
compatible = "rockchip,thunder-boot-mmc";
reg = <0x21470000 0x4000>;
clocks = <&cru HCLK_EMMC>, <&cru CCLK_EMMC>;
clock-names = "biu", "ciu";
memory-region-src = <&ramdisk_c>;
memory-region-dst = <&ramdisk_r>;
memory-region-idmac = <&mmc_idmac>;
};
};
&emmc {
memory-region-ecsd = <&mmc_ecsd>;
post-power-on-delay-ms = <0>;
};
&reserved_memory {
mmc_ecsd: mmc@47fffe00 {
reg = <0x47fffe00 0x00001000>;
};
mmc_idmac: mmc@48000000 {
reg = <0x48000000 0x00400000>;
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2025 Rockchip Electronics Co., Ltd.
*/
#include "rv1126b-thunder-boot.dtsi"
/ {
thunder_boot_spi_nor: thunder-boot-spi-nor {
compatible = "rockchip,thunder-boot-sfc";
reg = <0x21460000 0x4000>;
memory-region-src = <&ramdisk_c>;
memory-region-dst = <&ramdisk_r>;
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2025 Rockchip Electronics Co., Ltd.
*/
/ {
ramdisk: ramdisk {
compatible = "rockchip,ramdisk";
memory-region = <&ramdisk_r>;
};
};
&reserved_memory {
/*
* reserved memory layout
*
* H _______________________
* | |
* | ramdisk_c |
* |_______________________|
* | |
* | ramdisk_r |
* 0x48c40000 |_______________________|
* | |
* | mcu_log |
* 0x48c3c000 |_______________________|
* | |
* | mcu |
* 0x48c00000 |_______________________|
* | |
* | [TEEOS+TA+SHM] |
* 0x48400000 |_______________________|
* | |
* | isp[0..1]_tb_rmem |
* |_______________________|
* | |
* | meta |
* 0x41240000 |_______________________|
* | |
* | fdt |
* 0x41200000 |_______________________|
* | |
* | kernel_r |
* 0x40208000 |_______________________|
* | |
* | bl31 |
* L |_______________________|
*
*/
meta: meta@41240000 {
/* reg's offset MUST match with RTOS */
reg = <0x41240000 0x000c0000>;
};
rkisp_thunderboot: rkisp@41300000 {
/* reg's offset MUST match with RTOS */
/*
* vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num)
* e.g. 1920x1080: 0xa8c000
*/
reg = <0x41300000 0xa8c000>;
};
rkisp1_thunderboot: rkisp1_thunderboot {
/* vicap capture for a second camera */
};
/* Should enable this node if the security feature is enabled, like TA. */
tee: tee@48400000 {
reg = <0x48400000 0x00800000>;
status = "disabled";
};
rtos: rtos@48c00000 {
reg = <0x48c00000 0x0003a000>;
};
mcu_log: mcu_log@48c3c000 {
reg = <0x48c3c000 0x4000>;
};
ramdisk_r: ramdisk_r {
reg = <0x48c40000 (10 * 0x00100000)>;
};
ramdisk_c: ramdisk_c {
reg = <0x49640000 (5 * 0x00100000)>;
};
};
&hw_decompress {
memory-region = <&ramdisk_c>;
status = "okay";
};