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iwlwifi: pcie: add ISR debug info for msix debug
The debug prints help in case we get timeout on waiting for hw. Signed-off-by: Mordechay Goodstein <mordechay.goodstein@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Link: https://lore.kernel.org/r/iwlwifi.20210411124417.306e2e56d3e8.I72e2977abbb1fddf23b8476bedf6a183fe969ff5@changeid Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
This commit is contained in:
committed by
Luca Coelho
parent
2b6166664d
commit
9d401222db
@@ -1023,6 +1023,9 @@ static int iwl_pcie_napi_poll(struct napi_struct *napi, int budget)
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ret = iwl_pcie_rx_handle(trans, rxq->id, budget);
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IWL_DEBUG_ISR(trans, "[%d] handled %d, budget %d\n",
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rxq->id, ret, budget);
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if (ret < budget) {
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spin_lock(&trans_pcie->irq_lock);
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if (test_bit(STATUS_INT_ENABLED, &trans->status))
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@@ -1636,10 +1639,13 @@ irqreturn_t iwl_pcie_irq_rx_msix_handler(int irq, void *dev_id)
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if (WARN_ON(entry->entry >= trans->num_rx_queues))
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return IRQ_NONE;
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if (WARN_ONCE(!rxq, "Got MSI-X interrupt before we have Rx queues"))
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if (WARN_ONCE(!rxq,
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"[%d] Got MSI-X interrupt before we have Rx queues",
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entry->entry))
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return IRQ_NONE;
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lock_map_acquire(&trans->sync_cmd_lockdep_map);
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IWL_DEBUG_ISR(trans, "[%d] Got interrupt\n", entry->entry);
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local_bh_disable();
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if (napi_schedule_prep(&rxq->napi))
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@@ -2203,8 +2209,8 @@ irqreturn_t iwl_pcie_irq_msix_handler(int irq, void *dev_id)
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if (iwl_have_debug_level(IWL_DL_ISR)) {
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IWL_DEBUG_ISR(trans,
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"ISR inta_fh 0x%08x, enabled (sw) 0x%08x (hw) 0x%08x\n",
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inta_fh, trans_pcie->fh_mask,
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"ISR[%d] inta_fh 0x%08x, enabled (sw) 0x%08x (hw) 0x%08x\n",
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entry->entry, inta_fh, trans_pcie->fh_mask,
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iwl_read32(trans, CSR_MSIX_FH_INT_MASK_AD));
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if (inta_fh & ~trans_pcie->fh_mask)
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IWL_DEBUG_ISR(trans,
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@@ -2259,8 +2265,8 @@ irqreturn_t iwl_pcie_irq_msix_handler(int irq, void *dev_id)
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/* After checking FH register check HW register */
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if (iwl_have_debug_level(IWL_DL_ISR)) {
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IWL_DEBUG_ISR(trans,
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"ISR inta_hw 0x%08x, enabled (sw) 0x%08x (hw) 0x%08x\n",
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inta_hw, trans_pcie->hw_mask,
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"ISR[%d] inta_hw 0x%08x, enabled (sw) 0x%08x (hw) 0x%08x\n",
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entry->entry, inta_hw, trans_pcie->hw_mask,
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iwl_read32(trans, CSR_MSIX_HW_INT_MASK_AD));
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if (inta_hw & ~trans_pcie->hw_mask)
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IWL_DEBUG_ISR(trans,
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@@ -1604,6 +1604,11 @@ iwl_pcie_set_interrupt_capa(struct pci_dev *pdev,
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} else {
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trans_pcie->trans->num_rx_queues = num_irqs - 1;
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}
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IWL_DEBUG_INFO(trans,
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"MSI-X enabled with rx queues %d, vec mask 0x%x\n",
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trans_pcie->trans->num_rx_queues, trans_pcie->shared_vec_mask);
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WARN_ON(trans_pcie->trans->num_rx_queues > IWL_MAX_RX_HW_QUEUES);
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trans_pcie->alloc_vecs = num_irqs;
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