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arm64: dts: rockchip: rk3588: Add u2 and u3 phys for usb controllers

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This patch adds usb2_phy0 and usbdp_phy0 for usb3_0 otg,
usb2_phy1 and usbdp_phy1 for usb3_1 otg, usb2_phy2 for
usb2_0 host, usb2_phy3 for usb2_1 host.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I10eff4d7e993c317517f9cf86f6d126238c53f4e
This commit is contained in:
William Wu
2021-11-23 18:43:06 +08:00
committed by Tao Huang
parent ee3ec96219
commit 9e3a19c70f
2 changed files with 16 additions and 0 deletions
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3
arch/arm64/boot/dts/rockchip/rk3588.dtsi
View File

@@ -92,6 +92,8 @@
resets = <&cru SRST_A_USB3OTG1>;
reset-names = "usb3-otg";
dr_mode = "host";
phys = <&u2phy1_otg>, <&usbdp_phy1_u3>;
phy-names = "usb2-phy", "usb3-phy";
phy_type = "utmi_wide";
snps,dis_enblslpm_quirk;
snps,dis-u2-freeclk-exists-quirk;
@@ -129,6 +131,7 @@
interrupts = <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
clock-names = "phyclk";
clock-output-names = "usb480m_phy1";
#clock-cells = <0>;
status = "disabled";

13
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
View File

@@ -818,6 +818,8 @@
resets = <&cru SRST_A_USB3OTG0>;
reset-names = "usb3-otg";
dr_mode = "otg";
phys = <&u2phy0_otg>, <&usbdp_phy0_u3>;
phy-names = "usb2-phy", "usb3-phy";
phy_type = "utmi_wide";
snps,dis_enblslpm_quirk;
snps,dis-u1-entry-quirk;
@@ -835,6 +837,8 @@
interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>;
clock-names = "usbhost", "arbiter";
phys = <&u2phy2_host>;
phy-names = "usb2-phy";
power-domains = <&power RK3588_PD_USB>;
status = "disabled";
};
@@ -845,6 +849,8 @@
interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>;
clock-names = "usbhost", "arbiter";
phys = <&u2phy2_host>;
phy-names = "usb2-phy";
power-domains = <&power RK3588_PD_USB>;
status = "disabled";
};
@@ -855,6 +861,8 @@
interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>;
clock-names = "usbhost", "arbiter";
phys = <&u2phy3_host>;
phy-names = "usb2-phy";
power-domains = <&power RK3588_PD_USB>;
status = "disabled";
};
@@ -865,6 +873,8 @@
interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>;
clock-names = "usbhost", "arbiter";
phys = <&u2phy3_host>;
phy-names = "usb2-phy";
power-domains = <&power RK3588_PD_USB>;
status = "disabled";
};
@@ -1010,6 +1020,7 @@
interrupts = <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
clock-names = "phyclk";
clock-output-names = "usb480m_phy0";
#clock-cells = <0>;
status = "disabled";
@@ -1033,6 +1044,7 @@
interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
clock-names = "phyclk";
clock-output-names = "usb480m_phy2";
#clock-cells = <0>;
status = "disabled";
@@ -1056,6 +1068,7 @@
interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
clock-names = "phyclk";
clock-output-names = "usb480m_phy3";
#clock-cells = <0>;
status = "disabled";