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phy: rockchip-inno-usb2: add support for rk3128

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The rk312x use different config data which incluce control
register address and value. The patch add config data of
rk312x and match table to support rk3128.

Change-Id: Idd9a5c885cf5e291517e56232e77066eb5d97138
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
This commit is contained in:
Meng Dongyang
2017-09-11 19:07:34 +08:00
committed by Tao Huang
parent d789eb7a26
commit 9f42e95372
2 changed files with 51 additions and 0 deletions
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1
Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
View File

@@ -2,6 +2,7 @@ ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK
Required properties (phy (parent) node):
- compatible : should be one of the listed compatibles:
* "rockchip,rk3128-usb2phy"
* "rockchip,rk3228-usb2phy"
* "rockchip,rk3328-usb2phy"
* "rockchip,rk3366-usb2phy"

50
drivers/phy/rockchip/phy-rockchip-inno-usb2.c
View File

@@ -1835,6 +1835,55 @@ static const struct dev_pm_ops rockchip_usb2phy_dev_pm_ops = {
#define ROCKCHIP_USB2PHY_DEV_PM NULL
#endif /* CONFIG_PM_SLEEP */
static const struct rockchip_usb2phy_cfg rk312x_phy_cfgs[] = {
{
.reg = 0x17c,
.num_ports = 2,
.clkout_ctl = { 0x0190, 15, 15, 1, 0 },
.port_cfgs = {
[USB2PHY_PORT_OTG] = {
.phy_sus = { 0x017c, 8, 0, 0, 0x1d1 },
.bvalid_det_en = { 0x017c, 14, 14, 0, 1 },
.bvalid_det_st = { 0x017c, 15, 15, 0, 1 },
.bvalid_det_clr = { 0x017c, 15, 15, 0, 1 },
.iddig_output = { 0x017c, 10, 10, 0, 1 },
.iddig_en = { 0x017c, 9, 9, 0, 1 },
.idfall_det_en = { 0x01a0, 2, 2, 0, 1 },
.idfall_det_st = { 0x01a0, 3, 3, 0, 1 },
.idfall_det_clr = { 0x01a0, 3, 3, 0, 1 },
.idrise_det_en = { 0x01a0, 0, 0, 0, 1 },
.idrise_det_st = { 0x01a0, 1, 1, 0, 1 },
.idrise_det_clr = { 0x01a0, 1, 1, 0, 1 },
.ls_det_en = { 0x017c, 12, 12, 0, 1 },
.ls_det_st = { 0x017c, 13, 13, 0, 1 },
.ls_det_clr = { 0x017c, 13, 13, 0, 1 },
.utmi_bvalid = { 0x014c, 5, 5, 0, 1 },
.utmi_iddig = { 0x014c, 8, 8, 0, 1 },
.utmi_ls = { 0x014c, 7, 6, 0, 1 },
},
[USB2PHY_PORT_HOST] = {
.phy_sus = { 0x0194, 8, 0, 0, 0x1d1 },
.ls_det_en = { 0x0194, 14, 14, 0, 1 },
.ls_det_st = { 0x0194, 15, 15, 0, 1 },
.ls_det_clr = { 0x0194, 15, 15, 0, 1 }
}
},
.chg_det = {
.opmode = { 0x017c, 3, 0, 5, 1 },
.cp_det = { 0x02c0, 6, 6, 0, 1 },
.dcp_det = { 0x02c0, 5, 5, 0, 1 },
.dp_det = { 0x02c0, 7, 7, 0, 1 },
.idm_sink_en = { 0x0184, 8, 8, 0, 1 },
.idp_sink_en = { 0x0184, 7, 7, 0, 1 },
.idp_src_en = { 0x0184, 9, 9, 0, 1 },
.rdm_pdwn_en = { 0x0184, 10, 10, 0, 1 },
.vdm_src_en = { 0x0184, 12, 12, 0, 1 },
.vdp_src_en = { 0x0184, 11, 11, 0, 1 },
},
},
{ /* sentinel */ }
};
static const struct rockchip_usb2phy_cfg rk3228_phy_cfgs[] = {
{
.reg = 0x760,
@@ -2137,6 +2186,7 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
};
static const struct of_device_id rockchip_usb2phy_dt_match[] = {
{ .compatible = "rockchip,rk3128-usb2phy", .data = &rk312x_phy_cfgs },
{ .compatible = "rockchip,rk3228-usb2phy", .data = &rk3228_phy_cfgs },
{ .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },