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Merge tag 'zynq-dt-for-v5.15' of https://github.com/Xilinx/linux-xlnx into arm/dt

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ARM: dts: Zynq DT changes for v5.15

- Enable nand flash controller for ebaz4205 board

* tag 'zynq-dt-for-v5.15' of https://github.com/Xilinx/linux-xlnx:
  ARM: dts: ebaz4205: enable NAND support
  ARM: dts: zynq: add NAND flash controller node

Link: https://lore.kernel.org/r/f3dc69c8-8a22-e938-4ddf-b1052b8c1437@monstr.eu
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2021-08-26 11:45:06 +02:00
parent bb4544c6d4 c387eea58f
commit 9fdbbe8443
2 changed files with 33 additions and 0 deletions
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21
arch/arm/boot/dts/zynq-7000.dtsi
View File

@@ -252,6 +252,27 @@
#size-cells = <0>;
};
smcc: memory-controller@e000e000 {
compatible = "arm,pl353-smc-r2p1", "arm,primecell";
reg = <0xe000e000 0x0001000>;
status = "disabled";
clock-names = "memclk", "apb_pclk";
clocks = <&clkc 11>, <&clkc 44>;
ranges = <0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */
0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */
0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */
#address-cells = <2>;
#size-cells = <1>;
nfc0: nand-controller@0,0 {
compatible = "arm,pl353-nand-r2p1";
reg = <0 0 0x1000000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
};
sdhci0: mmc@e0100000 {
compatible = "arasan,sdhci-8.9a";
status = "disabled";

12
arch/arm/boot/dts/zynq-ebaz4205.dts
View File

@@ -48,6 +48,14 @@
pinctrl-0 = <&pinctrl_gpio0_default>;
};
&nfc0 {
status = "okay";
nand@0 {
reg = <0>;
};
};
&pinctrl0 {
pinctrl_gpio0_default: gpio0-default {
mux {
@@ -118,6 +126,10 @@
};
};
&smcc {
status = "okay";
};
&sdhci0 {
status = "okay";
disable-wp;