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media: i2c: rk628: cru: add hdmirx aud apll support

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Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: I48096a61485b856f09eed0fa53976e0536625515
This commit is contained in:
Shunhua Lan
2023-11-08 17:04:05 +08:00
committed by Tao Huang
parent d8bbd5d31a
commit a0befaf85d
2 changed files with 24 additions and 10 deletions
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27
drivers/media/i2c/rk628/rk628_cru.c
View File

@@ -297,17 +297,24 @@ static unsigned long rk628_cru_clk_set_rate_sclk_vop(struct rk628 *rk628,
}
static unsigned long rk628_cru_clk_set_rate_sclk_hdmirx_aud(struct rk628 *rk628,
unsigned long rate)
unsigned long rate)
{
u64 parent_rate;
u8 div;
parent_rate = rk628_cru_clk_set_rate_pll(rk628, CGU_CLK_GPLL, rate*4);
if (rk628->version >= RK628F_VERSION)
parent_rate = rk628_cru_clk_set_rate_pll(rk628, CGU_CLK_APLL, rate*4);
else
parent_rate = rk628_cru_clk_set_rate_pll(rk628, CGU_CLK_GPLL, rate*4);
div = DIV_ROUND_CLOSEST_ULL(parent_rate, rate);
do_div(parent_rate, div);
rate = parent_rate;
rk628_i2c_write(rk628, CRU_CLKSEL_CON05, 0x3fc0 << 16 | ((div - 1) << 6) |
CLK_HDMIRX_AUD_SEL << 16 | CLK_HDMIRX_AUD_SEL);
if (rk628->version >= RK628F_VERSION)
rk628_i2c_write(rk628, CRU_CLKSEL_CON05, CLK_HDMIRX_AUD_DIV(div - 1) |
CLK_HDMIRX_AUD_SEL_V2(2));
else
rk628_i2c_write(rk628, CRU_CLKSEL_CON05, CLK_HDMIRX_AUD_DIV(div - 1) |
CLK_HDMIRX_AUD_SEL_V1(1));
return rate;
}
@@ -319,11 +326,17 @@ static unsigned long rk628_cru_clk_get_rate_sclk_hdmirx_aud(struct rk628 *rk628)
u32 val;
rk628_i2c_read(rk628, CRU_CLKSEL_CON05, &val);
if (val & CLK_HDMIRX_AUD_SEL)
parent_rate = rk628_cru_clk_get_rate_pll(rk628, CGU_CLK_GPLL);
div = ((val & CLK_HDMIRX_AUD_DIV_MASK) >> 6) + 1;
if (rk628->version >= RK628F_VERSION)
val = (val & CLK_HDMIRX_AUD_SEL_MASK_V2) >> 14;
else
val = (val & CLK_HDMIRX_AUD_SEL_MASK_V1) >> 15;
if (!val)
parent_rate = rk628_cru_clk_get_rate_pll(rk628, CGU_CLK_CPLL);
div = ((val&0x3fc0) >> 6) + 1;
else if (val == 2)
parent_rate = rk628_cru_clk_get_rate_pll(rk628, CGU_CLK_APLL);
else
parent_rate = rk628_cru_clk_get_rate_pll(rk628, CGU_CLK_GPLL);
do_div(parent_rate, div);
rate = parent_rate;
return rate;

7
drivers/media/i2c/rk628/rk628_cru.h
View File

@@ -80,9 +80,10 @@
#define CRU_CLKSEL_CON05 CRU_REG(0x0094)
#define CLK_HDMIRX_AUD_DIV_MASK GENMASK(13, 6)
#define CLK_HDMIRX_AUD_DIV(x) HIWORD_UPDATE(x, 13, 6)
#define CLK_HDMIRX_AUD_SEL_MASK GENMASK(15, 14)
#define CLK_HDMIRX_AUD_SEL_BITS(x) HIWORD_UPDATE(x, 15, 14)
#define CLK_HDMIRX_AUD_SEL BIT(15)
#define CLK_HDMIRX_AUD_SEL_V1(x) HIWORD_UPDATE(x, 15, 15)
#define CLK_HDMIRX_AUD_SEL_MASK_V1 GENMASK(15, 15)
#define CLK_HDMIRX_AUD_SEL_V2(x) HIWORD_UPDATE(x, 15, 14)
#define CLK_HDMIRX_AUD_SEL_MASK_V2 GENMASK(15, 14)
#define CRU_CLKSEL_CON06 CRU_REG(0x0098)
#define SCLK_UART_SEL(x) HIWORD_UPDATE(x, 15, 14)
#define SCLK_UART_SEL_MASK GENMASK(15, 14)