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Merge tag 'v6.6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable into odroid-6.6.y

Browse Source 
This is the 6.6.16 stable release

Change-Id: I3d62fd572aade1125a7ee1fc30aa47d0c16fbf3a
This commit is contained in:
Mauro (mdrjr) Ribeiro
2024-04-30 10:37:44 -03:00
parent 5f1fe7a1b2 eb3e299184
commit a0e6fa72d7
442 changed files with 3757 additions and 2169 deletions
Download Patch File Download Diff File Expand all files Collapse all files

22
Documentation/ABI/testing/sysfs-class-net-queues
View File

@@ -1,4 +1,4 @@
What: /sys/class/<iface>/queues/rx-<queue>/rps_cpus
What: /sys/class/net/<iface>/queues/rx-<queue>/rps_cpus
Date: March 2010
KernelVersion: 2.6.35
Contact: netdev@vger.kernel.org
@@ -8,7 +8,7 @@ Description:
network device queue. Possible values depend on the number
of available CPU(s) in the system.
What: /sys/class/<iface>/queues/rx-<queue>/rps_flow_cnt
What: /sys/class/net/<iface>/queues/rx-<queue>/rps_flow_cnt
Date: April 2010
KernelVersion: 2.6.35
Contact: netdev@vger.kernel.org
@@ -16,7 +16,7 @@ Description:
Number of Receive Packet Steering flows being currently
processed by this particular network device receive queue.
What: /sys/class/<iface>/queues/tx-<queue>/tx_timeout
What: /sys/class/net/<iface>/queues/tx-<queue>/tx_timeout
Date: November 2011
KernelVersion: 3.3
Contact: netdev@vger.kernel.org
@@ -24,7 +24,7 @@ Description:
Indicates the number of transmit timeout events seen by this
network interface transmit queue.
What: /sys/class/<iface>/queues/tx-<queue>/tx_maxrate
What: /sys/class/net/<iface>/queues/tx-<queue>/tx_maxrate
Date: March 2015
KernelVersion: 4.1
Contact: netdev@vger.kernel.org
@@ -32,7 +32,7 @@ Description:
A Mbps max-rate set for the queue, a value of zero means disabled,
default is disabled.
What: /sys/class/<iface>/queues/tx-<queue>/xps_cpus
What: /sys/class/net/<iface>/queues/tx-<queue>/xps_cpus
Date: November 2010
KernelVersion: 2.6.38
Contact: netdev@vger.kernel.org
@@ -42,7 +42,7 @@ Description:
network device transmit queue. Possible values depend on the
number of available CPU(s) in the system.
What: /sys/class/<iface>/queues/tx-<queue>/xps_rxqs
What: /sys/class/net/<iface>/queues/tx-<queue>/xps_rxqs
Date: June 2018
KernelVersion: 4.18.0
Contact: netdev@vger.kernel.org
@@ -53,7 +53,7 @@ Description:
number of available receive queue(s) in the network device.
Default is disabled.
What: /sys/class/<iface>/queues/tx-<queue>/byte_queue_limits/hold_time
What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/hold_time
Date: November 2011
KernelVersion: 3.3
Contact: netdev@vger.kernel.org
@@ -62,7 +62,7 @@ Description:
of this particular network device transmit queue.
Default value is 1000.
What: /sys/class/<iface>/queues/tx-<queue>/byte_queue_limits/inflight
What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/inflight
Date: November 2011
KernelVersion: 3.3
Contact: netdev@vger.kernel.org
@@ -70,7 +70,7 @@ Description:
Indicates the number of bytes (objects) in flight on this
network device transmit queue.
What: /sys/class/<iface>/queues/tx-<queue>/byte_queue_limits/limit
What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/limit
Date: November 2011
KernelVersion: 3.3
Contact: netdev@vger.kernel.org
@@ -79,7 +79,7 @@ Description:
on this network device transmit queue. This value is clamped
to be within the bounds defined by limit_max and limit_min.
What: /sys/class/<iface>/queues/tx-<queue>/byte_queue_limits/limit_max
What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/limit_max
Date: November 2011
KernelVersion: 3.3
Contact: netdev@vger.kernel.org
@@ -88,7 +88,7 @@ Description:
queued on this network device transmit queue. See
include/linux/dynamic_queue_limits.h for the default value.
What: /sys/class/<iface>/queues/tx-<queue>/byte_queue_limits/limit_min
What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/limit_min
Date: November 2011
KernelVersion: 3.3
Contact: netdev@vger.kernel.org

2
Documentation/sound/soc/dapm.rst
View File

@@ -234,7 +234,7 @@ corresponding soft power control. In this case it is necessary to create
a virtual widget - a widget with no control bits e.g.
::
SND_SOC_DAPM_MIXER("AC97 Mixer", SND_SOC_DAPM_NOPM, 0, 0, NULL, 0),
SND_SOC_DAPM_MIXER("AC97 Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
This can be used to merge to signal paths together in software.

2
Documentation/sphinx/cdomain.py
View File

@@ -93,7 +93,7 @@ def markup_ctype_refs(match):
#
RE_expr = re.compile(r':c:(expr|texpr):`([^\`]+)`')
def markup_c_expr(match):
return '\ ``' + match.group(2) + '``\ '
return '\\ ``' + match.group(2) + '``\\ '
#
# Parse Sphinx 3.x C markups, replacing them by backward-compatible ones

2
Documentation/sphinx/kernel_abi.py
View File

@@ -102,7 +102,7 @@ class KernelCmd(Directive):
code_block += "\n " + l
lines = code_block + "\n\n"
line_regex = re.compile("^\.\. LINENO (\S+)\#([0-9]+)$")
line_regex = re.compile(r"^\.\. LINENO (\S+)\#([0-9]+)$")
ln = 0
n = 0
f = fname

2
Documentation/sphinx/kernel_feat.py
View File

@@ -95,7 +95,7 @@ class KernelFeat(Directive):
lines = subprocess.check_output(args, cwd=os.path.dirname(doc.current_source)).decode('utf-8')
line_regex = re.compile("^\.\. FILE (\S+)$")
line_regex = re.compile(r"^\.\. FILE (\S+)$")
out_lines = ""

2
Documentation/sphinx/kerneldoc.py
View File

@@ -130,7 +130,7 @@ class KernelDocDirective(Directive):
result = ViewList()
lineoffset = 0;
line_regex = re.compile("^\.\. LINENO ([0-9]+)$")
line_regex = re.compile(r"^\.\. LINENO ([0-9]+)$")
for line in lines:
match = line_regex.search(line)
if match:

8
Documentation/sphinx/maintainers_include.py
View File

@@ -77,7 +77,7 @@ class MaintainersInclude(Include):
line = line.rstrip()
# Linkify all non-wildcard refs to ReST files in Documentation/.
pat = '(Documentation/([^\s\?\*]*)\.rst)'
pat = r'(Documentation/([^\s\?\*]*)\.rst)'
m = re.search(pat, line)
if m:
# maintainers.rst is in a subdirectory, so include "../".
@@ -90,11 +90,11 @@ class MaintainersInclude(Include):
output = "| %s" % (line.replace("\\", "\\\\"))
# Look for and record field letter to field name mappings:
# R: Designated *reviewer*: FullName <address@domain>
m = re.search("\s(\S):\s", line)
m = re.search(r"\s(\S):\s", line)
if m:
field_letter = m.group(1)
if field_letter and not field_letter in fields:
m = re.search("\*([^\*]+)\*", line)
m = re.search(r"\*([^\*]+)\*", line)
if m:
fields[field_letter] = m.group(1)
elif subsystems:
@@ -112,7 +112,7 @@ class MaintainersInclude(Include):
field_content = ""
# Collapse whitespace in subsystem name.
heading = re.sub("\s+", " ", line)
heading = re.sub(r"\s+", " ", line)
output = output + "%s\n%s" % (heading, "~" * len(heading))
field_prev = ""
else:

2
Makefile
View File

@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 6
PATCHLEVEL = 6
SUBLEVEL = 15
SUBLEVEL = 16
EXTRAVERSION =
NAME = Hurr durr I'ma ninja sloth

2
arch/arm/boot/dts/nxp/imx/imx1-ads.dts
View File

@@ -65,7 +65,7 @@
pinctrl-0 = <&pinctrl_weim>;
status = "okay";
nor: nor@0,0 {
nor: flash@0,0 {
compatible = "cfi-flash";
reg = <0 0x00000000 0x02000000>;
bank-width = <4>;

2
arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts
View File

@@ -45,7 +45,7 @@
pinctrl-0 = <&pinctrl_weim>;
status = "okay";
nor: nor@0,0 {
nor: flash@0,0 {
compatible = "cfi-flash";
reg = <0 0x00000000 0x02000000>;
bank-width = <2>;

5
arch/arm/boot/dts/nxp/imx/imx1.dtsi
View File

@@ -268,9 +268,12 @@
status = "disabled";
};
esram: esram@300000 {
esram: sram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x20000>;
ranges = <0 0x00300000 0x20000>;
#address-cells = <1>;
#size-cells = <1>;
};
};
};

2
arch/arm/boot/dts/nxp/imx/imx25-eukrea-cpuimx25.dtsi
View File

@@ -27,7 +27,7 @@
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
pcf8563@51 {
rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};

2
arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts
View File

@@ -16,7 +16,7 @@
bus-width = <18>;
display-timings {
native-mode = <&qvga_timings>;
qvga_timings: 320x240 {
qvga_timings: timing0 {
clock-frequency = <6500000>;
hactive = <320>;
vactive = <240>;

2
arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dts
View File

@@ -16,7 +16,7 @@
bus-width = <18>;
display-timings {
native-mode = <&dvi_svga_timings>;
dvi_svga_timings: 800x600 {
dvi_svga_timings: timing0 {
clock-frequency = <40000000>;
hactive = <800>;
vactive = <600>;

2
arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-dvi-vga.dts
View File

@@ -16,7 +16,7 @@
bus-width = <18>;
display-timings {
native-mode = <&dvi_vga_timings>;
dvi_vga_timings: 640x480 {
dvi_vga_timings: timing0 {
clock-frequency = <31250000>;
hactive = <640>;
vactive = <480>;

2
arch/arm/boot/dts/nxp/imx/imx25-pdk.dts
View File

@@ -68,7 +68,7 @@
bus-width = <18>;
display-timings {
native-mode = <&wvga_timings>;
wvga_timings: 640x480 {
wvga_timings: timing0 {
hactive = <640>;
vactive = <480>;
hback-porch = <45>;

2
arch/arm/boot/dts/nxp/imx/imx25.dtsi
View File

@@ -543,7 +543,7 @@
};
iim: efuse@53ff0000 {
compatible = "fsl,imx25-iim", "fsl,imx27-iim";
compatible = "fsl,imx25-iim";
reg = <0x53ff0000 0x4000>;
interrupts = <19>;
clocks = <&clks 99>;

4
arch/arm/boot/dts/nxp/imx/imx27-apf27dev.dts
View File

@@ -16,7 +16,7 @@
fsl,pcr = <0xfae80083>; /* non-standard but required */
display-timings {
native-mode = <&timing0>;
timing0: 800x480 {
timing0: timing0 {
clock-frequency = <33000033>;
hactive = <800>;
vactive = <480>;
@@ -47,7 +47,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
user {
led-user {
label = "Heartbeat";
gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";

4
arch/arm/boot/dts/nxp/imx/imx27-eukrea-cpuimx27.dtsi
View File

@@ -33,7 +33,7 @@
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
pcf8563@51 {
rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
@@ -90,7 +90,7 @@
&weim {
status = "okay";
nor: nor@0,0 {
nor: flash@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";

2
arch/arm/boot/dts/nxp/imx/imx27-eukrea-mbimxsd27-baseboard.dts
View File

@@ -16,7 +16,7 @@
display-timings {
native-mode = <&timing0>;
timing0: 320x240 {
timing0: timing0 {
clock-frequency = <6500000>;
hactive = <320>;
vactive = <240>;

2
arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-rdk.dts
View File

@@ -19,7 +19,7 @@
fsl,pcr = <0xf0c88080>; /* non-standard but required */
display-timings {
native-mode = <&timing0>;
timing0: 640x480 {
timing0: timing0 {
hactive = <640>;
vactive = <480>;
hback-porch = <112>;

2
arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-rdk.dts
View File

@@ -19,7 +19,7 @@
display-timings {
native-mode = <&timing0>;
timing0: 240x320 {
timing0: timing0 {
clock-frequency = <5500000>;
hactive = <240>;
vactive = <320>;

2
arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-som.dtsi
View File

@@ -314,7 +314,7 @@
&weim {
status = "okay";
nor: nor@0,0 {
nor: flash@0,0 {
compatible = "cfi-flash";
reg = <0 0x00000000 0x02000000>;
bank-width = <2>;

3
arch/arm/boot/dts/nxp/imx/imx27.dtsi
View File

@@ -588,6 +588,9 @@
iram: sram@ffff4c00 {
compatible = "mmio-sram";
reg = <0xffff4c00 0xb400>;
ranges = <0 0xffff4c00 0xb400>;
#address-cells = <1>;
#size-cells = <1>;
};
};
};

3
arch/arm/boot/dts/nxp/imx/imx7d.dtsi
View File

@@ -217,9 +217,6 @@
};
&ca_funnel_in_ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
ca_funnel_in_port1: endpoint {

10
arch/arm/boot/dts/nxp/imx/imx7s.dtsi
View File

@@ -190,7 +190,11 @@
clock-names = "apb_pclk";
ca_funnel_in_ports: in-ports {
port {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ca_funnel_in_port0: endpoint {
remote-endpoint = <&etm0_out_port>;
};
@@ -814,7 +818,7 @@
};
lcdif: lcdif@30730000 {
compatible = "fsl,imx7d-lcdif", "fsl,imx28-lcdif";
compatible = "fsl,imx7d-lcdif", "fsl,imx6sx-lcdif";
reg = <0x30730000 0x10000>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>,
@@ -1278,7 +1282,7 @@
gpmi: nand-controller@33002000 {
compatible = "fsl,imx7d-gpmi-nand";
#address-cells = <1>;
#size-cells = <1>;
#size-cells = <0>;
reg = <0x33002000 0x2000>, <0x33004000 0x4000>;
reg-names = "gpmi-nand", "bch";
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;

12
arch/arm/boot/dts/nxp/mxs/imx23-sansa.dts
View File

@@ -175,10 +175,8 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-gpio";
gpios = <
&gpio1 24 0 /* SDA */
&gpio1 22 0 /* SCL */
>;
sda-gpios = <&gpio1 24 0>;
scl-gpios = <&gpio1 22 0>;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
};
@@ -186,10 +184,8 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-gpio";
gpios = <
&gpio0 31 0 /* SDA */
&gpio0 30 0 /* SCL */
>;
sda-gpios = <&gpio0 31 0>;
scl-gpios = <&gpio0 30 0>;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
touch: touch@20 {

2
arch/arm/boot/dts/nxp/mxs/imx23.dtsi
View File

@@ -412,7 +412,7 @@
status = "disabled";
};
dma_apbx: dma-apbx@80024000 {
dma_apbx: dma-controller@80024000 {
compatible = "fsl,imx23-dma-apbx";
reg = <0x80024000 0x2000>;
interrupts = <7>, <5>, <9>, <26>,

2
arch/arm/boot/dts/nxp/mxs/imx28.dtsi
View File

@@ -990,7 +990,7 @@
status = "disabled";
};
dma_apbx: dma-apbx@80024000 {
dma_apbx: dma-controller@80024000 {
compatible = "fsl,imx28-dma-apbx";
reg = <0x80024000 0x2000>;
interrupts = <78>, <79>, <66>, <0>,

0
arch/arm/boot/dts/qcom/qcom-pm8226.dtsi → arch/arm/boot/dts/qcom/pm8226.dtsi
View File

0
arch/arm/boot/dts/qcom/qcom-pm8841.dtsi → arch/arm/boot/dts/qcom/pm8841.dtsi
View File

0
arch/arm/boot/dts/qcom/qcom-pm8941.dtsi → arch/arm/boot/dts/qcom/pm8941.dtsi
View File

0
arch/arm/boot/dts/qcom/qcom-pma8084.dtsi → arch/arm/boot/dts/qcom/pma8084.dtsi
View File

0
arch/arm/boot/dts/qcom/qcom-pmx55.dtsi → arch/arm/boot/dts/qcom/pmx55.dtsi
View File

0
arch/arm/boot/dts/qcom/qcom-pmx65.dtsi → arch/arm/boot/dts/qcom/pmx65.dtsi
View File

2
arch/arm/boot/dts/qcom/qcom-apq8026-asus-sparrow.dts
View File

@@ -6,7 +6,7 @@
/dts-v1/;
#include "qcom-msm8226.dtsi"
#include "qcom-pm8226.dtsi"
#include "pm8226.dtsi"
/delete-node/ &adsp_region;

2
arch/arm/boot/dts/qcom/qcom-apq8026-huawei-sturgeon.dts
View File

@@ -6,7 +6,7 @@
/dts-v1/;
#include "qcom-msm8226.dtsi"
#include "qcom-pm8226.dtsi"
#include "pm8226.dtsi"
#include <dt-bindings/input/ti-drv260x.h>
/delete-node/ &adsp_region;

2
arch/arm/boot/dts/qcom/qcom-apq8026-lg-lenok.dts
View File

@@ -6,7 +6,7 @@
/dts-v1/;
#include "qcom-msm8226.dtsi"
#include "qcom-pm8226.dtsi"
#include "pm8226.dtsi"
/delete-node/ &adsp_region;

2
arch/arm/boot/dts/qcom/qcom-apq8026-samsung-matisse-wifi.dts
View File

@@ -7,7 +7,7 @@
#include <dt-bindings/input/input.h>
#include "qcom-msm8226.dtsi"
#include "qcom-pm8226.dtsi"
#include "pm8226.dtsi"
/delete-node/ &adsp_region;
/delete-node/ &smem_region;

4
arch/arm/boot/dts/qcom/qcom-apq8060-dragonboard.dts
View File

@@ -72,7 +72,7 @@
/* Trig on both edges - getting close or far away */
interrupts-extended = <&pm8058_gpio 34 IRQ_TYPE_EDGE_BOTH>;
/* MPP05 analog input to the XOADC */
io-channels = <&xoadc 0x00 0x05>;
io-channels = <&pm8058_xoadc 0x00 0x05>;
io-channel-names = "aout";
pinctrl-names = "default";
pinctrl-0 = <&dragon_cm3605_gpios>, <&dragon_cm3605_mpps>;
@@ -945,7 +945,7 @@
};
};
&xoadc {
&pm8058_xoadc {
/* Reference voltage 2.2 V */
xoadc-ref-supply = <&pm8058_l18>;

4
arch/arm/boot/dts/qcom/qcom-apq8074-dragonboard.dts
View File

@@ -4,8 +4,8 @@
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include "qcom-msm8974.dtsi"
#include "qcom-pm8841.dtsi"
#include "qcom-pm8941.dtsi"
#include "pm8841.dtsi"
#include "pm8941.dtsi"
/delete-node/ &mpss_region;

2
arch/arm/boot/dts/qcom/qcom-apq8084-ifc6540.dts
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
#include "qcom-apq8084.dtsi"
#include "qcom-pma8084.dtsi"
#include "pma8084.dtsi"
/ {
model = "Qualcomm APQ8084/IFC6540";

2
arch/arm/boot/dts/qcom/qcom-apq8084-mtp.dts
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
#include "qcom-apq8084.dtsi"
#include "qcom-pma8084.dtsi"
#include "pma8084.dtsi"
/ {
model = "Qualcomm APQ 8084-MTP";

2
arch/arm/boot/dts/qcom/qcom-mdm9615-wp8548.dtsi
View File

@@ -76,7 +76,7 @@
};
};
&pmicgpio {
&pm8018_gpio {
usb_vbus_5v_pins: usb-vbus-5v-state {
pins = "gpio4";
function = "normal";

14
arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi
View File

@@ -261,7 +261,7 @@
reg = <0x500000 0x1000>;
qcom,controller-type = "pmic-arbiter";
pmicintc: pmic {
pm8018: pmic {
compatible = "qcom,pm8018", "qcom,pm8921";
interrupts = <GIC_PPI 226 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
@@ -272,38 +272,38 @@
pwrkey@1c {
compatible = "qcom,pm8018-pwrkey", "qcom,pm8921-pwrkey";
reg = <0x1c>;
interrupt-parent = <&pmicintc>;
interrupt-parent = <&pm8018>;
interrupts = <50 IRQ_TYPE_EDGE_RISING>,
<51 IRQ_TYPE_EDGE_RISING>;
debounce = <15625>;
pull-up;
};
pmicmpp: mpps@50 {
pm8018_mpps: mpps@50 {
compatible = "qcom,pm8018-mpp", "qcom,ssbi-mpp";
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x50>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pmicmpp 0 0 6>;
gpio-ranges = <&pm8018_mpps 0 0 6>;
};
rtc@11d {
compatible = "qcom,pm8018-rtc", "qcom,pm8921-rtc";
interrupt-parent = <&pmicintc>;
interrupt-parent = <&pm8018>;
interrupts = <39 IRQ_TYPE_EDGE_RISING>;
reg = <0x11d>;
allow-set-time;
};
pmicgpio: gpio@150 {
pm8018_gpio: gpio@150 {
compatible = "qcom,pm8018-gpio", "qcom,ssbi-gpio";
reg = <0x150>;
interrupt-controller;
#interrupt-cells = <2>;
gpio-controller;
gpio-ranges = <&pmicgpio 0 0 6>;
gpio-ranges = <&pm8018_gpio 0 0 6>;
#gpio-cells = <2>;
};
};

16
arch/arm/boot/dts/qcom/qcom-msm8660.dtsi
View File

@@ -80,13 +80,13 @@
*/
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&xoadc 0x00 0x01>, /* Battery */
<&xoadc 0x00 0x02>, /* DC in (charger) */
<&xoadc 0x00 0x04>, /* VPH the main system voltage */
<&xoadc 0x00 0x0b>, /* Die temperature */
<&xoadc 0x00 0x0c>, /* Reference voltage 1.25V */
<&xoadc 0x00 0x0d>, /* Reference voltage 0.625V */
<&xoadc 0x00 0x0e>; /* Reference voltage 0.325V */
io-channels = <&pm8058_xoadc 0x00 0x01>, /* Battery */
<&pm8058_xoadc 0x00 0x02>, /* DC in (charger) */
<&pm8058_xoadc 0x00 0x04>, /* VPH the main system voltage */
<&pm8058_xoadc 0x00 0x0b>, /* Die temperature */
<&pm8058_xoadc 0x00 0x0c>, /* Reference voltage 1.25V */
<&pm8058_xoadc 0x00 0x0d>, /* Reference voltage 0.625V */
<&pm8058_xoadc 0x00 0x0e>; /* Reference voltage 0.325V */
};
soc: soc {
@@ -390,7 +390,7 @@
row-hold = <91500>;
};
xoadc: xoadc@197 {
pm8058_xoadc: xoadc@197 {
compatible = "qcom,pm8058-adc";
reg = <0x197>;
interrupts-extended = <&pm8058 76 IRQ_TYPE_EDGE_RISING>;

4
arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts
View File

@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
#include "qcom-msm8974.dtsi"
#include "qcom-pm8841.dtsi"
#include "qcom-pm8941.dtsi"
#include "pm8841.dtsi"
#include "pm8941.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>

4
arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine.dtsi
View File

@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
#include "qcom-msm8974.dtsi"
#include "qcom-pm8841.dtsi"
#include "qcom-pm8941.dtsi"
#include "pm8841.dtsi"
#include "pm8941.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>

4
arch/arm/boot/dts/qcom/qcom-msm8974pro-fairphone-fp2.dts
View File

@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
#include "qcom-msm8974pro.dtsi"
#include "qcom-pm8841.dtsi"
#include "qcom-pm8941.dtsi"
#include "pm8841.dtsi"
#include "pm8941.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>

4
arch/arm/boot/dts/qcom/qcom-msm8974pro-oneplus-bacon.dts
View File

@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
#include "qcom-msm8974pro.dtsi"
#include "qcom-pm8841.dtsi"
#include "qcom-pm8941.dtsi"
#include "pm8841.dtsi"
#include "pm8941.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>

2
arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte.dts
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
#include "qcom-msm8974pro.dtsi"
#include "qcom-pma8084.dtsi"
#include "pma8084.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/leds/common.h>

4
arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts
View File

@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
#include "qcom-msm8974pro.dtsi"
#include "qcom-pm8841.dtsi"
#include "qcom-pm8941.dtsi"
#include "pm8841.dtsi"
#include "pm8941.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>

2
arch/arm/boot/dts/qcom/qcom-sdx55-mtp.dts
View File

@@ -9,7 +9,7 @@
#include "qcom-sdx55.dtsi"
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <arm64/qcom/pm8150b.dtsi>
#include "qcom-pmx55.dtsi"
#include "pmx55.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDX55 MTP";

2
arch/arm/boot/dts/qcom/qcom-sdx55-t55.dts
View File

@@ -8,7 +8,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "qcom-sdx55.dtsi"
#include "qcom-pmx55.dtsi"
#include "pmx55.dtsi"
/ {
model = "Thundercomm T55 Development Kit";

2
arch/arm/boot/dts/qcom/qcom-sdx55-telit-fn980-tlb.dts
View File

@@ -8,7 +8,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "qcom-sdx55.dtsi"
#include "qcom-pmx55.dtsi"
#include "pmx55.dtsi"
/ {
model = "Telit FN980 TLB";

2
arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dts
View File

@@ -8,7 +8,7 @@
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <arm64/qcom/pmk8350.dtsi>
#include <arm64/qcom/pm7250b.dtsi>
#include "qcom-pmx65.dtsi"
#include "pmx65.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDX65 MTP";

14
arch/arm/boot/dts/rockchip/rk3036.dtsi
View File

@@ -402,12 +402,20 @@
pinctrl-0 = <&hdmi_ctl>;
status = "disabled";
hdmi_in: port {
ports {
#address-cells = <1>;
#size-cells = <0>;
hdmi_in_vop: endpoint@0 {
hdmi_in: port@0 {
reg = <0>;
remote-endpoint = <&vop_out_hdmi>;
hdmi_in_vop: endpoint {
remote-endpoint = <&vop_out_hdmi>;
};
};
hdmi_out: port@1 {
reg = <1>;
};
};
};

26
arch/arm/boot/dts/samsung/exynos4.dtsi
View File

@@ -203,16 +203,16 @@
camera: camera@11800000 {
compatible = "samsung,fimc";
ranges = <0x0 0x11800000 0xa0000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <1>;
#clock-cells = <1>;
clock-output-names = "cam_a_clkout", "cam_b_clkout";
ranges;
fimc_0: fimc@11800000 {
fimc_0: fimc@0 {
compatible = "samsung,exynos4210-fimc";
reg = <0x11800000 0x1000>;
reg = <0x0 0x1000>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_FIMC0>,
<&clock CLK_SCLK_FIMC0>;
@@ -223,9 +223,9 @@
status = "disabled";
};
fimc_1: fimc@11810000 {
fimc_1: fimc@10000 {
compatible = "samsung,exynos4210-fimc";
reg = <0x11810000 0x1000>;
reg = <0x00010000 0x1000>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_FIMC1>,
<&clock CLK_SCLK_FIMC1>;
@@ -236,9 +236,9 @@
status = "disabled";
};
fimc_2: fimc@11820000 {
fimc_2: fimc@20000 {
compatible = "samsung,exynos4210-fimc";
reg = <0x11820000 0x1000>;
reg = <0x00020000 0x1000>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_FIMC2>,
<&clock CLK_SCLK_FIMC2>;
@@ -249,9 +249,9 @@
status = "disabled";
};
fimc_3: fimc@11830000 {
fimc_3: fimc@30000 {
compatible = "samsung,exynos4210-fimc";
reg = <0x11830000 0x1000>;
reg = <0x00030000 0x1000>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_FIMC3>,
<&clock CLK_SCLK_FIMC3>;
@@ -262,9 +262,9 @@
status = "disabled";
};
csis_0: csis@11880000 {
csis_0: csis@80000 {
compatible = "samsung,exynos4210-csis";
reg = <0x11880000 0x4000>;
reg = <0x00080000 0x4000>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_CSIS0>,
<&clock CLK_SCLK_CSIS0>;
@@ -278,9 +278,9 @@
#size-cells = <0>;
};
csis_1: csis@11890000 {
csis_1: csis@90000 {
compatible = "samsung,exynos4210-csis";
reg = <0x11890000 0x4000>;
reg = <0x00090000 0x4000>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_CSIS1>,
<&clock CLK_SCLK_CSIS1>;

17
arch/arm/boot/dts/samsung/exynos4x12.dtsi
View File

@@ -451,14 +451,15 @@
};
&camera {
ranges = <0x0 0x11800000 0xba1000>;
clocks = <&clock CLK_SCLK_CAM0>, <&clock CLK_SCLK_CAM1>,
<&clock CLK_PIXELASYNCM0>, <&clock CLK_PIXELASYNCM1>;
clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
/* fimc_[0-3] are configured outside, under phandles */
fimc_lite_0: fimc-lite@12390000 {
fimc_lite_0: fimc-lite@b90000 {
compatible = "samsung,exynos4212-fimc-lite";
reg = <0x12390000 0x1000>;
reg = <0x00b90000 0x1000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_isp>;
clocks = <&isp_clock CLK_ISP_FIMC_LITE0>;
@@ -467,9 +468,9 @@
status = "disabled";
};
fimc_lite_1: fimc-lite@123a0000 {
fimc_lite_1: fimc-lite@ba0000 {
compatible = "samsung,exynos4212-fimc-lite";
reg = <0x123a0000 0x1000>;
reg = <0x00ba0000 0x1000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_isp>;
clocks = <&isp_clock CLK_ISP_FIMC_LITE1>;
@@ -478,9 +479,9 @@
status = "disabled";
};
fimc_is: fimc-is@12000000 {
fimc_is: fimc-is@800000 {
compatible = "samsung,exynos4212-fimc-is";
reg = <0x12000000 0x260000>;
reg = <0x00800000 0x260000>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_isp>;
@@ -525,9 +526,9 @@
reg = <0x10020000 0x3000>;
};
i2c1_isp: i2c-isp@12140000 {
i2c1_isp: i2c-isp@940000 {
compatible = "samsung,exynos4212-i2c-isp";
reg = <0x12140000 0x100>;
reg = <0x00940000 0x100>;
clocks = <&isp_clock CLK_ISP_I2C1_ISP>;
clock-names = "i2c_isp";
#address-cells = <1>;

18
arch/arm/boot/dts/samsung/s5pv210.dtsi
View File

@@ -549,17 +549,17 @@
camera: camera@fa600000 {
compatible = "samsung,fimc";
ranges = <0x0 0xfa600000 0xe01000>;
clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>;
clock-names = "sclk_cam0", "sclk_cam1";
#address-cells = <1>;
#size-cells = <1>;
#clock-cells = <1>;
clock-output-names = "cam_a_clkout", "cam_b_clkout";
ranges;
csis0: csis@fa600000 {
csis0: csis@0 {
compatible = "samsung,s5pv210-csis";
reg = <0xfa600000 0x4000>;
reg = <0x00000000 0x4000>;
interrupt-parent = <&vic2>;
interrupts = <29>;
clocks = <&clocks CLK_CSIS>,
@@ -572,9 +572,9 @@
#size-cells = <0>;
};
fimc0: fimc@fb200000 {
fimc0: fimc@c00000 {
compatible = "samsung,s5pv210-fimc";
reg = <0xfb200000 0x1000>;
reg = <0x00c00000 0x1000>;
interrupts = <5>;
interrupt-parent = <&vic2>;
clocks = <&clocks CLK_FIMC0>,
@@ -586,9 +586,9 @@
samsung,cam-if;
};
fimc1: fimc@fb300000 {
fimc1: fimc@d00000 {
compatible = "samsung,s5pv210-fimc";
reg = <0xfb300000 0x1000>;
reg = <0x00d00000 0x1000>;
interrupt-parent = <&vic2>;
interrupts = <6>;
clocks = <&clocks CLK_FIMC1>,
@@ -602,9 +602,9 @@
samsung,lcd-wb;
};
fimc2: fimc@fb400000 {
fimc2: fimc@e00000 {
compatible = "samsung,s5pv210-fimc";
reg = <0xfb400000 0x1000>;
reg = <0x00e00000 0x1000>;
interrupt-parent = <&vic2>;
interrupts = <7>;
clocks = <&clocks CLK_FIMC2>,

2
arch/arm/include/asm/irq_work.h
View File

@@ -9,6 +9,4 @@ static inline bool arch_irq_work_has_interrupt(void)
return is_smp();
}
extern void arch_irq_work_raise(void);
#endif /* _ASM_ARM_IRQ_WORK_H */

4
arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts
View File

@@ -15,7 +15,7 @@
#size-cells = <2>;
aliases {
serial0 = &uart_B;
serial0 = &uart_b;
};
memory@0 {
@@ -25,6 +25,6 @@
};
&uart_B {
&uart_b {
status = "okay";
};

4
arch/arm64/boot/dts/amlogic/meson-s4.dtsi
View File

@@ -118,14 +118,14 @@
<10 11 12 13 14 15 16 17 18 19 20 21>;
};
uart_B: serial@7a000 {
uart_b: serial@7a000 {
compatible = "amlogic,meson-s4-uart",
"amlogic,meson-ao-uart";
reg = <0x0 0x7a000 0x0 0x18>;
interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
clocks = <&xtal>, <&xtal>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
status = "disabled";
};
reset: reset-controller@2000 {

21
arch/arm64/boot/dts/qcom/msm8996.dtsi
View File

@@ -443,6 +443,19 @@
reg = <0x0 0x80000000 0x0 0x0>;
};
etm {
compatible = "qcom,coresight-remote-etm";
out-ports {
port {
modem_etm_out_funnel_in2: endpoint {
remote-endpoint =
<&funnel_in2_in_modem_etm>;
};
};
};
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
@@ -2643,6 +2656,14 @@
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
in-ports {
port {
funnel_in2_in_modem_etm: endpoint {
remote-endpoint =
<&modem_etm_out_funnel_in2>;
};
};
};
out-ports {
port {

32
arch/arm64/boot/dts/qcom/msm8998.dtsi
View File

@@ -2034,9 +2034,11 @@
cpu = <&CPU4>;
port {
etm4_out: endpoint {
remote-endpoint = <&apss_funnel_in4>;
out-ports {
port {
etm4_out: endpoint {
remote-endpoint = <&apss_funnel_in4>;
};
};
};
};
@@ -2051,9 +2053,11 @@
cpu = <&CPU5>;
port {
etm5_out: endpoint {
remote-endpoint = <&apss_funnel_in5>;
out-ports {
port {
etm5_out: endpoint {
remote-endpoint = <&apss_funnel_in5>;
};
};
};
};
@@ -2068,9 +2072,11 @@
cpu = <&CPU6>;
port {
etm6_out: endpoint {
remote-endpoint = <&apss_funnel_in6>;
out-ports {
port {
etm6_out: endpoint {
remote-endpoint = <&apss_funnel_in6>;
};
};
};
};
@@ -2085,9 +2091,11 @@
cpu = <&CPU7>;
port {
etm7_out: endpoint {
remote-endpoint = <&apss_funnel_in7>;
out-ports {
port {
etm7_out: endpoint {
remote-endpoint = <&apss_funnel_in7>;
};
};
};
};

5
arch/arm64/boot/dts/qcom/sdm845.dtsi
View File

@@ -3555,11 +3555,8 @@
};
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
port {
etf_in: endpoint {
remote-endpoint =
<&merge_funnel_out>;

5
arch/arm64/boot/dts/qcom/sm8150.dtsi
View File

@@ -2973,11 +2973,8 @@
};
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
port {
replicator1_in: endpoint {
remote-endpoint = <&replicator_out1>;
};

24
arch/arm64/boot/dts/qcom/sm8250.dtsi
View File

@@ -2830,11 +2830,8 @@
clock-names = "apb_pclk";
out-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
port {
tpda_out_funnel_qatb: endpoint {
remote-endpoint = <&funnel_qatb_in_tpda>;
};
@@ -2877,11 +2874,7 @@
};
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
port {
funnel_qatb_in_tpda: endpoint {
remote-endpoint = <&tpda_out_funnel_qatb>;
};
@@ -3090,11 +3083,8 @@
};
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
port {
etf_in_funnel_swao_out: endpoint {
remote-endpoint = <&funnel_swao_out_etf>;
};
@@ -3178,8 +3168,6 @@
clock-names = "apb_pclk";
out-ports {
#address-cells = <1>;
#size-cells = <0>;
port {
tpdm_mm_out_tpda9: endpoint {
remote-endpoint = <&tpda_9_in_tpdm_mm>;
@@ -3445,11 +3433,7 @@
};
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
port {
funnel_apss_merg_in_funnel_apss: endpoint {
remote-endpoint = <&funnel_apss_out_funnel_apss_merg>;
};

8
arch/arm64/boot/dts/qcom/sm8350.dtsi
View File

@@ -2020,7 +2020,7 @@
compatible = "qcom,sm8350-mpss-pas";
reg = <0x0 0x04080000 0x0 0x4040>;
interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
<&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>,
<&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>,
<&smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING>,
@@ -2062,7 +2062,7 @@
compatible = "qcom,sm8350-slpi-pas";
reg = <0 0x05c00000 0 0x4000>;
interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>,
interrupts-extended = <&pdc 9 IRQ_TYPE_EDGE_RISING>,
<&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>,
<&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>,
<&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>,
@@ -3206,7 +3206,7 @@
compatible = "qcom,sm8350-adsp-pas";
reg = <0 0x17300000 0 0x100>;
interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
@@ -3511,7 +3511,7 @@
compatible = "qcom,sm8350-cdsp-pas";
reg = <0 0x98900000 0 0x1400000>;
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
<&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
<&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
<&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,

8
arch/arm64/boot/dts/qcom/sm8450.dtsi
View File

@@ -2176,7 +2176,7 @@
#sound-dai-cells = <1>;
};
swr4: soundwire-controller@31f0000 {
swr4: soundwire@31f0000 {
compatible = "qcom,soundwire-v1.7.0";
reg = <0 0x031f0000 0 0x2000>;
interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
@@ -2224,7 +2224,7 @@
#sound-dai-cells = <1>;
};
swr1: soundwire-controller@3210000 {
swr1: soundwire@3210000 {
compatible = "qcom,soundwire-v1.7.0";
reg = <0 0x03210000 0 0x2000>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
@@ -2291,7 +2291,7 @@
#sound-dai-cells = <1>;
};
swr0: soundwire-controller@3250000 {
swr0: soundwire@3250000 {
compatible = "qcom,soundwire-v1.7.0";
reg = <0 0x03250000 0 0x2000>;
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
@@ -2318,7 +2318,7 @@
status = "disabled";
};
swr2: soundwire-controller@33b0000 {
swr2: soundwire@33b0000 {
compatible = "qcom,soundwire-v1.7.0";
reg = <0 0x033b0000 0 0x2000>;
interrupts = <GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,

8
arch/arm64/boot/dts/qcom/sm8550.dtsi
View File

@@ -2044,7 +2044,7 @@
#sound-dai-cells = <1>;
};
swr3: soundwire-controller@6ab0000 {
swr3: soundwire@6ab0000 {
compatible = "qcom,soundwire-v2.0.0";
reg = <0 0x06ab0000 0 0x10000>;
interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
@@ -2090,7 +2090,7 @@
#sound-dai-cells = <1>;
};
swr1: soundwire-controller@6ad0000 {
swr1: soundwire@6ad0000 {
compatible = "qcom,soundwire-v2.0.0";
reg = <0 0x06ad0000 0 0x10000>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
@@ -2155,7 +2155,7 @@
#sound-dai-cells = <1>;
};
swr0: soundwire-controller@6b10000 {
swr0: soundwire@6b10000 {
compatible = "qcom,soundwire-v2.0.0";
reg = <0 0x06b10000 0 0x10000>;
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
@@ -2182,7 +2182,7 @@
status = "disabled";
};
swr2: soundwire-controller@6d30000 {
swr2: soundwire@6d30000 {
compatible = "qcom,soundwire-v2.0.0";
reg = <0 0x06d30000 0 0x10000>;
interrupts = <GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,

3
arch/arm64/boot/dts/sprd/ums512.dtsi
View File

@@ -113,7 +113,7 @@
idle-states {
entry-method = "psci";
CORE_PD: core-pd {
CORE_PD: cpu-pd {
compatible = "arm,idle-state";
entry-latency-us = <4000>;
exit-latency-us = <4000>;
@@ -291,6 +291,7 @@
pll2: clock-controller@0 {
compatible = "sprd,ums512-gc-pll";
reg = <0x0 0x100>;
clocks = <&ext_26m>;
clock-names = "ext-26m";
#clock-cells = <1>;
};

76
arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
View File

@@ -21,6 +21,44 @@
/dts-v1/;
/plugin/;
&{/} {
si5332_0: si5332-0 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
};
si5332_1: si5332-1 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
si5332_2: si5332-2 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
si5332_3: si5332-3 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
si5332_4: si5332-4 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
};
si5332_5: si5332-5 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
};
};
&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
#address-cells = <1>;
#size-cells = <0>;
@@ -34,44 +72,6 @@
/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
};
&amba {
si5332_0: si5332_0 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
};
si5332_1: si5332_1 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
si5332_2: si5332_2 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
si5332_3: si5332_3 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
si5332_4: si5332_4 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
};
si5332_5: si5332_5 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
};
};
/* DP/USB 3.0 and SATA */
&psgtr {
status = "okay";

76
arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
View File

@@ -16,6 +16,44 @@
/dts-v1/;
/plugin/;
&{/} {
si5332_0: si5332-0 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
};
si5332_1: si5332-1 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
si5332_2: si5332-2 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
si5332_3: si5332-3 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
si5332_4: si5332-4 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
};
si5332_5: si5332-5 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
};
};
&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
#address-cells = <1>;
#size-cells = <0>;
@@ -30,44 +68,6 @@
/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
};
&amba {
si5332_0: si5332_0 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
};
si5332_1: si5332_1 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
si5332_2: si5332_2 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
si5332_3: si5332_3 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
si5332_4: si5332_4 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
};
si5332_5: si5332_5 { /* u17 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
};
};
/* DP/USB 3.0 */
&psgtr {
status = "okay";

2
arch/arm64/include/asm/irq_work.h
View File

@@ -2,8 +2,6 @@
#ifndef __ASM_IRQ_WORK_H
#define __ASM_IRQ_WORK_H
extern void arch_irq_work_raise(void);
static inline bool arch_irq_work_has_interrupt(void)
{
return true;

7
arch/arm64/kernel/irq.c
View File

@@ -22,6 +22,7 @@
#include <linux/vmalloc.h>
#include <asm/daifflags.h>
#include <asm/exception.h>
#include <asm/numa.h>
#include <asm/softirq_stack.h>
#include <asm/stacktrace.h>
#include <asm/vmap_stack.h>
@@ -47,17 +48,17 @@ static void init_irq_scs(void)
for_each_possible_cpu(cpu)
per_cpu(irq_shadow_call_stack_ptr, cpu) =
scs_alloc(cpu_to_node(cpu));
scs_alloc(early_cpu_to_node(cpu));
}
#ifdef CONFIG_VMAP_STACK
static void init_irq_stacks(void)
static void __init init_irq_stacks(void)
{
int cpu;
unsigned long *p;
for_each_possible_cpu(cpu) {
p = arch_alloc_vmap_stack(IRQ_STACK_SIZE, cpu_to_node(cpu));
p = arch_alloc_vmap_stack(IRQ_STACK_SIZE, early_cpu_to_node(cpu));
per_cpu(irq_stack_ptr, cpu) = p;
}
}

2
arch/csky/include/asm/irq_work.h
View File

@@ -7,5 +7,5 @@ static inline bool arch_irq_work_has_interrupt(void)
{
return true;
}
extern void arch_irq_work_raise(void);
#endif /* __ASM_CSKY_IRQ_WORK_H */

1
arch/loongarch/kernel/smp.c
View File

@@ -506,7 +506,6 @@ asmlinkage void start_secondary(void)
sync_counter();
cpu = raw_smp_processor_id();
set_my_cpu_offset(per_cpu_offset(cpu));
rcu_cpu_starting(cpu);
cpu_probe();
constant_clockevent_init();

16
arch/loongarch/mm/tlb.c
View File

@@ -284,12 +284,16 @@ static void setup_tlb_handler(int cpu)
set_handler(EXCCODE_TLBNR * VECSIZE, handle_tlb_protect, VECSIZE);
set_handler(EXCCODE_TLBNX * VECSIZE, handle_tlb_protect, VECSIZE);
set_handler(EXCCODE_TLBPE * VECSIZE, handle_tlb_protect, VECSIZE);
}
} else {
int vec_sz __maybe_unused;
void *addr __maybe_unused;
struct page *page __maybe_unused;
/* Avoid lockdep warning */
rcu_cpu_starting(cpu);
#ifdef CONFIG_NUMA
else {
void *addr;
struct page *page;
const int vec_sz = sizeof(exception_handlers);
vec_sz = sizeof(exception_handlers);
if (pcpu_handlers[cpu])
return;
@@ -305,8 +309,8 @@ static void setup_tlb_handler(int cpu)
csr_write64(pcpu_handlers[cpu], LOONGARCH_CSR_EENTRY);
csr_write64(pcpu_handlers[cpu], LOONGARCH_CSR_MERRENTRY);
csr_write64(pcpu_handlers[cpu] + 80*VECSIZE, LOONGARCH_CSR_TLBRENTRY);
}
#endif
}
}
void tlb_init(int cpu)

2
arch/powerpc/crypto/aes-gcm-p10-glue.c
View File

@@ -37,7 +37,7 @@ asmlinkage void aes_p10_gcm_encrypt(u8 *in, u8 *out, size_t len,
void *rkey, u8 *iv, void *Xi);
asmlinkage void aes_p10_gcm_decrypt(u8 *in, u8 *out, size_t len,
void *rkey, u8 *iv, void *Xi);
asmlinkage void gcm_init_htable(unsigned char htable[256], unsigned char Xi[16]);
asmlinkage void gcm_init_htable(unsigned char htable[], unsigned char Xi[]);
asmlinkage void gcm_ghash_p10(unsigned char *Xi, unsigned char *Htable,
unsigned char *aad, unsigned int alen);

1
arch/powerpc/include/asm/irq_work.h
View File

@@ -6,6 +6,5 @@ static inline bool arch_irq_work_has_interrupt(void)
{
return true;
}
extern void arch_irq_work_raise(void);
#endif /* _ASM_POWERPC_IRQ_WORK_H */

4
arch/powerpc/include/asm/mmu.h
View File

@@ -412,5 +412,9 @@ extern void *abatron_pteptrs[2];
#include <asm/nohash/mmu.h>
#endif
#if defined(CONFIG_FA_DUMP) || defined(CONFIG_PRESERVE_FA_DUMP)
#define __HAVE_ARCH_RESERVED_KERNEL_PAGES
#endif
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_MMU_H_ */

8
arch/powerpc/include/asm/mmzone.h
View File

@@ -42,14 +42,6 @@ u64 memory_hotplug_max(void);
#else
#define memory_hotplug_max() memblock_end_of_DRAM()
#endif /* CONFIG_NUMA */
#ifdef CONFIG_FA_DUMP
#define __HAVE_ARCH_RESERVED_KERNEL_PAGES
#endif
#ifdef CONFIG_MEMORY_HOTPLUG
extern int create_section_mapping(unsigned long start, unsigned long end,
int nid, pgprot_t prot);
#endif
#endif /* __KERNEL__ */
#endif /* _ASM_MMZONE_H_ */

2
arch/powerpc/kernel/traps.c
View File

@@ -1439,10 +1439,12 @@ static int emulate_instruction(struct pt_regs *regs)
return -EINVAL;
}
#ifdef CONFIG_GENERIC_BUG
int is_valid_bugaddr(unsigned long addr)
{
return is_kernel_addr(addr);
}
#endif
#ifdef CONFIG_MATH_EMULATION
static int emulate_math(struct pt_regs *regs)

10
arch/powerpc/lib/sstep.c
View File

@@ -586,6 +586,8 @@ static int do_fp_load(struct instruction_op *op, unsigned long ea,
} u;
nb = GETSIZE(op->type);
if (nb > sizeof(u))
return -EINVAL;
if (!address_ok(regs, ea, nb))
return -EFAULT;
rn = op->reg;
@@ -636,6 +638,8 @@ static int do_fp_store(struct instruction_op *op, unsigned long ea,
} u;
nb = GETSIZE(op->type);
if (nb > sizeof(u))
return -EINVAL;
if (!address_ok(regs, ea, nb))
return -EFAULT;
rn = op->reg;
@@ -680,6 +684,9 @@ static nokprobe_inline int do_vec_load(int rn, unsigned long ea,
u8 b[sizeof(__vector128)];
} u = {};
if (size > sizeof(u))
return -EINVAL;
if (!address_ok(regs, ea & ~0xfUL, 16))
return -EFAULT;
/* align to multiple of size */
@@ -707,6 +714,9 @@ static nokprobe_inline int do_vec_store(int rn, unsigned long ea,
u8 b[sizeof(__vector128)];
} u;
if (size > sizeof(u))
return -EINVAL;
if (!address_ok(regs, ea & ~0xfUL, 16))
return -EFAULT;
/* align to multiple of size */

2
arch/powerpc/mm/book3s64/pgtable.c
View File

@@ -542,6 +542,7 @@ void ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr,
set_pte_at(vma->vm_mm, addr, ptep, pte);
}
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
/*
* For hash translation mode, we use the deposited table to store hash slot
* information and they are stored at PTRS_PER_PMD offset from related pmd
@@ -563,6 +564,7 @@ int pmd_move_must_withdraw(struct spinlock *new_pmd_ptl,
return true;
}
#endif
/*
* Does the CPU support tlbie?

5
arch/powerpc/mm/init-common.c
View File

@@ -126,7 +126,7 @@ void pgtable_cache_add(unsigned int shift)
* as to leave enough 0 bits in the address to contain it. */
unsigned long minalign = max(MAX_PGTABLE_INDEX_SIZE + 1,
HUGEPD_SHIFT_MASK + 1);
struct kmem_cache *new;
struct kmem_cache *new = NULL;
/* It would be nice if this was a BUILD_BUG_ON(), but at the
* moment, gcc doesn't seem to recognize is_power_of_2 as a
@@ -139,7 +139,8 @@ void pgtable_cache_add(unsigned int shift)
align = max_t(unsigned long, align, minalign);
name = kasprintf(GFP_KERNEL, "pgtable-2^%d", shift);
new = kmem_cache_create(name, table_size, align, 0, ctor(shift));
if (name)
new = kmem_cache_create(name, table_size, align, 0, ctor(shift));
if (!new)
panic("Could not allocate pgtable cache for order %d", shift);

5
arch/powerpc/mm/mmu_decl.h
View File

@@ -181,3 +181,8 @@ static inline bool debug_pagealloc_enabled_or_kfence(void)
{
return IS_ENABLED(CONFIG_KFENCE) || debug_pagealloc_enabled();
}
#ifdef CONFIG_MEMORY_HOTPLUG
int create_section_mapping(unsigned long start, unsigned long end,
int nid, pgprot_t prot);
#endif

2
arch/riscv/include/asm/irq_work.h
View File

@@ -6,5 +6,5 @@ static inline bool arch_irq_work_has_interrupt(void)
{
return IS_ENABLED(CONFIG_SMP);
}
extern void arch_irq_work_raise(void);
#endif /* _ASM_RISCV_IRQ_WORK_H */

1
arch/riscv/kernel/head.S
View File

@@ -88,6 +88,7 @@ relocate_enable_mmu:
/* Compute satp for kernel page tables, but don't load it yet */
srl a2, a0, PAGE_SHIFT
la a1, satp_mode
XIP_FIXUP_OFFSET a1
REG_L a1, 0(a1)
or a2, a2, a1

12
arch/riscv/mm/init.c
View File

@@ -172,6 +172,9 @@ void __init mem_init(void)
/* Limit the memory size via mem. */
static phys_addr_t memory_limit;
#ifdef CONFIG_XIP_KERNEL
#define memory_limit (*(phys_addr_t *)XIP_FIXUP(&memory_limit))
#endif /* CONFIG_XIP_KERNEL */
static int __init early_mem(char *p)
{
@@ -950,7 +953,7 @@ static void __init create_fdt_early_page_table(uintptr_t fix_fdt_va,
* setup_vm_final installs the linear mapping. For 32-bit kernel, as the
* kernel is mapped in the linear mapping, that makes no difference.
*/
dtb_early_va = kernel_mapping_pa_to_va(XIP_FIXUP(dtb_pa));
dtb_early_va = kernel_mapping_pa_to_va(dtb_pa);
#endif
dtb_early_pa = dtb_pa;
@@ -1053,9 +1056,13 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa)
#endif
kernel_map.virt_addr = KERNEL_LINK_ADDR + kernel_map.virt_offset;
kernel_map.page_offset = _AC(CONFIG_PAGE_OFFSET, UL);
#ifdef CONFIG_XIP_KERNEL
#ifdef CONFIG_64BIT
kernel_map.page_offset = PAGE_OFFSET_L3;
#else
kernel_map.page_offset = _AC(CONFIG_PAGE_OFFSET, UL);
#endif
kernel_map.xiprom = (uintptr_t)CONFIG_XIP_PHYS_ADDR;
kernel_map.xiprom_sz = (uintptr_t)(&_exiprom) - (uintptr_t)(&_xiprom);
@@ -1065,6 +1072,7 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa)
kernel_map.va_kernel_xip_pa_offset = kernel_map.virt_addr - kernel_map.xiprom;
#else
kernel_map.page_offset = _AC(CONFIG_PAGE_OFFSET, UL);
kernel_map.phys_addr = (uintptr_t)(&_start);
kernel_map.size = (uintptr_t)(&_end) - kernel_map.phys_addr;
#endif

2
arch/s390/boot/ipl_parm.c
View File

@@ -272,7 +272,7 @@ void parse_boot_command_line(void)
memory_limit = round_down(memparse(val, NULL), PAGE_SIZE);
if (!strcmp(param, "vmalloc") && val) {
vmalloc_size = round_up(memparse(val, NULL), PAGE_SIZE);
vmalloc_size = round_up(memparse(val, NULL), _SEGMENT_SIZE);
vmalloc_size_set = 1;
}

3
arch/s390/boot/startup.c
View File

@@ -212,7 +212,8 @@ static unsigned long setup_kernel_memory_layout(void)
VMALLOC_END = MODULES_VADDR;
/* allow vmalloc area to occupy up to about 1/2 of the rest virtual space left */
vmalloc_size = min(vmalloc_size, round_down(VMALLOC_END / 2, _REGION3_SIZE));
vsize = round_down(VMALLOC_END / 2, _SEGMENT_SIZE);
vmalloc_size = min(vmalloc_size, vsize);
VMALLOC_START = VMALLOC_END - vmalloc_size;
/* split remaining virtual space between 1:1 mapping & vmemmap array */

2
arch/s390/include/asm/irq_work.h
View File

@@ -7,6 +7,4 @@ static inline bool arch_irq_work_has_interrupt(void)
return true;
}
void arch_irq_work_raise(void);
#endif /* _ASM_S390_IRQ_WORK_H */

6
arch/s390/kernel/ptrace.c
View File

@@ -385,6 +385,7 @@ static int __poke_user(struct task_struct *child, addr_t addr, addr_t data)
/*
* floating point control reg. is in the thread structure
*/
save_fpu_regs();
if ((unsigned int) data != 0 ||
test_fp_ctl(data >> (BITS_PER_LONG - 32)))
return -EINVAL;
@@ -741,6 +742,7 @@ static int __poke_user_compat(struct task_struct *child,
/*
* floating point control reg. is in the thread structure
*/
save_fpu_regs();
if (test_fp_ctl(tmp))
return -EINVAL;
child->thread.fpu.fpc = data;
@@ -904,9 +906,7 @@ static int s390_fpregs_set(struct task_struct *target,
int rc = 0;
freg_t fprs[__NUM_FPRS];
if (target == current)
save_fpu_regs();
save_fpu_regs();
if (MACHINE_HAS_VX)
convert_vx_to_fp(fprs, target->thread.fpu.vxrs);
else

5
arch/s390/kvm/kvm-s390.c
View File

@@ -4307,10 +4307,6 @@ int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
vcpu_load(vcpu);
if (test_fp_ctl(fpu->fpc)) {
ret = -EINVAL;
goto out;
}
vcpu->run->s.regs.fpc = fpu->fpc;
if (MACHINE_HAS_VX)
convert_fp_to_vx((__vector128 *) vcpu->run->s.regs.vrs,
@@ -4318,7 +4314,6 @@ int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
else
memcpy(vcpu->run->s.regs.fprs, &fpu->fprs, sizeof(fpu->fprs));
out:
vcpu_put(vcpu);
return ret;
}

2
arch/um/drivers/net_kern.c
View File

@@ -204,7 +204,7 @@ static int uml_net_close(struct net_device *dev)
return 0;
}
static int uml_net_start_xmit(struct sk_buff *skb, struct net_device *dev)
static netdev_tx_t uml_net_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
struct uml_net_private *lp = netdev_priv(dev);
unsigned long flags;

2
arch/um/include/shared/kern_util.h
View File

@@ -50,7 +50,7 @@ extern void do_uml_exitcalls(void);
* Are we disallowed to sleep? Used to choose between GFP_KERNEL and
* GFP_ATOMIC.
*/
extern int __cant_sleep(void);
extern int __uml_cant_sleep(void);
extern int get_current_pid(void);
extern int copy_from_user_proc(void *to, void *from, int size);
extern char *uml_strdup(const char *string);

2
arch/um/kernel/process.c
View File

@@ -220,7 +220,7 @@ void arch_cpu_idle(void)
um_idle_sleep();
}
int __cant_sleep(void) {
int __uml_cant_sleep(void) {
return in_atomic() || irqs_disabled() || in_interrupt();
/* Is in_interrupt() really needed? */
}

32
arch/um/kernel/time.c
View File

@@ -432,9 +432,29 @@ static void time_travel_update_time(unsigned long long next, bool idle)
time_travel_del_event(&ne);
}
static void time_travel_update_time_rel(unsigned long long offs)
{
unsigned long flags;
/*
* Disable interrupts before calculating the new time so
* that a real timer interrupt (signal) can't happen at
* a bad time e.g. after we read time_travel_time but
* before we've completed updating the time.
*/
local_irq_save(flags);
time_travel_update_time(time_travel_time + offs, false);
local_irq_restore(flags);
}
void time_travel_ndelay(unsigned long nsec)
{
time_travel_update_time(time_travel_time + nsec, false);
/*
* Not strictly needed to use _rel() version since this is
* only used in INFCPU/EXT modes, but it doesn't hurt and
* is more readable too.
*/
time_travel_update_time_rel(nsec);
}
EXPORT_SYMBOL(time_travel_ndelay);
@@ -568,7 +588,11 @@ static void time_travel_set_start(void)
#define time_travel_time 0
#define time_travel_ext_waiting 0
static inline void time_travel_update_time(unsigned long long ns, bool retearly)
static inline void time_travel_update_time(unsigned long long ns, bool idle)
{
}
static inline void time_travel_update_time_rel(unsigned long long offs)
{
}
@@ -720,9 +744,7 @@ static u64 timer_read(struct clocksource *cs)
*/
if (!irqs_disabled() && !in_interrupt() && !in_softirq() &&
!time_travel_ext_waiting)
time_travel_update_time(time_travel_time +
TIMER_MULTIPLIER,
false);
time_travel_update_time_rel(TIMER_MULTIPLIER);
return time_travel_time / TIMER_MULTIPLIER;
}

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