Documentation: bindings: add DT documentation for u2phy and u2phy grf

Due to the u2phy registers are separated from general grf, we need to
add u2phy grf node and place u2phy node in it. And on some platform,
the 480m clock may need to assign clock parent in dts in stead of
clock driver. So this patch add u2phy grf node and property of
assigned-clocks and assigned-clock-parents to assign parent for 480m
clock.

Change-Id: I88e63745e38265814169136f079a00791f5813b3
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>

Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt

@@ -91,3 +91,44 @@ grf: syscon@ff770000 {
 		};
 	};
 };
+
+Required properties (usb2phy grf node):
+ - compatible : should be one of the listed compatibles:
+		"rockchip,rk3328-usb2phy-grf", "syscon", "simple-mfd";
+ - reg : the address offset of grf for usb-phy configuration.
+ - #address-cells : should be 1.
+ - #size-cells : should be 1.
+
+Required nodes : a sub-node is required for the phy provides.
+		 The sub-node name is used to identify each phy,
+		 and shall be the following entries:
+
+Example:
+
+usb2phy_grf: syscon@ff450000 {
+	compatible = "rockchip,rk3328-usb2phy-grf", "syscon",
+		     "simple-mfd";
+	reg = <0x0 0xff450000 0x0 0x10000>;
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	u2phy: usb2-phy@100 {
+		compatible = "rockchip,rk3328-usb2phy";
+		reg = <0x100 0x10>;
+		clocks = <&xin24m>;
+		clock-names = "phyclk";
+		#clock-cells = <0>;
+		assigned-clocks = <&cru USB480M>;
+		assigned-clock-parents = <&u2phy>;
+		clock-output-names = "usb480m_phy";
+		status = "disabled";
+
+		u2phy_host: host-port {
+			#phy-cells = <0>;
+			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "linestate";
+			status = "disabled";
+		};
+	};
+};
+