shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-06 19:08:57 +09:00
Code Issues Packages Projects Releases Wiki Activity

arm64: dts: rockchip: px30: add i2s0 node

Browse Source 
Change-Id: If95dd83975301c62b14bd7be6dbaa6bdd20db826
Signed-off-by: Liang Chen <cl@rock-chips.com>
This commit is contained in:
Liang Chen
2022-08-30 11:01:17 +08:00
committed by Tao Huang
parent d0dc5a0c04
commit a16f19fa44
1 changed files with 28 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

28
arch/arm64/boot/dts/rockchip/px30.dtsi
View File

@@ -681,6 +681,34 @@
status = "disabled";
};
i2s0_8ch: i2s@ff060000 {
compatible = "rockchip,px30-i2s-tdm";
reg = <0x0 0xff060000 0x0 0x1000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_I2S0_TX>, <&cru SCLK_I2S0_RX>, <&cru HCLK_I2S0>;
clock-names = "mclk_tx", "mclk_rx", "hclk";
dmas = <&dmac 16>, <&dmac 17>;
dma-names = "tx", "rx";
resets = <&cru SRST_I2S0_TX>, <&cru SRST_I2S0_RX>;
reset-names = "tx-m", "rx-m";
rockchip,cru = <&cru>;
rockchip,grf = <&grf>;
pinctrl-names = "default";
pinctrl-0 = <&i2s0_8ch_sclktx
&i2s0_8ch_sclkrx
&i2s0_8ch_lrcktx
&i2s0_8ch_lrckrx
&i2s0_8ch_sdi0
&i2s0_8ch_sdi1
&i2s0_8ch_sdi2
&i2s0_8ch_sdi3
&i2s0_8ch_sdo0
&i2s0_8ch_sdo1
&i2s0_8ch_sdo2
&i2s0_8ch_sdo3>;
status = "disabled";
};
i2s1_2ch: i2s@ff070000 {
compatible = "rockchip,px30-i2s", "rockchip,rk3066-i2s";
reg = <0x0 0xff070000 0x0 0x1000>;