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[ARM] tegra: harmony: remove hard-coded partition table
use the partition information provided on the kernel command line rather than a fixed table that is subject to change. Change-Id: I650f634bf49b8658debb75535e94f2a497ef3432 Signed-off-by: Gary King <gking@nvidia.com>
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@@ -104,61 +104,10 @@ static struct tegra_nand_chip_parms nand_chip_parms[] = {
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},
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};
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/* Current layout is:
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*
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* BCT @ 0 (0x300000) -- boot config table
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* PT @ 0x300000 (0x1000) -- partition table
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* EBT @ 0x301000 (0x100000) -- bootloader
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* BMP @ 0x401000 (0x148c) -- rgb565 bitmap
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* WAV @ 0x40248c (0x2a000) -- wav audio clip
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* ARG @ 0x42c48c (0x800) -- ??
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* DRM @ 0x42cc8c (0x19000) -- bleh?
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* UIP @ 0x445c8c (0x800) -- update information partition
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* USP @ 0x44648c (0x600000) -- update staging partition
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* USR @ 0xa4648c (THE REST) -- <available>
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*
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* What we will do is we will actually just skip the first 16MB, and just
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* mark it as vendor, and then layout our partitions.
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*
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* so:
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*
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*
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*/
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static struct mtd_partition harmony_nand_partitions[] = {
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[0] = {
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.name = "recovery",
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.offset = 0x1b80*0x800,
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.size = 0xa00*0x800,
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.mask_flags = MTD_WRITEABLE, /* r/o */
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},
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[1] = {
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.name = "boot",
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.offset = 0x2680*0x800,
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.size = 0x1000*0x800,
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},
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[2] = {
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.name = "system",
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.offset = 0x3780*0x800,
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.size = 0xef40*0x800,
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},
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[3] = {
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.name = "cache",
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.offset = 0x127c0*0x800,
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.size = 0x4000*0x800,
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},
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[4] = {
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.name = "userdata",
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.offset = 0x168c0*0x800,
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.size = 0x29640*0x800,
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},
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};
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struct tegra_nand_platform harmony_nand_data = {
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.max_chips = 8,
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.chip_parms = nand_chip_parms,
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.nr_chip_parms = ARRAY_SIZE(nand_chip_parms),
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.parts = harmony_nand_partitions,
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.nr_parts = ARRAY_SIZE(harmony_nand_partitions),
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};
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static struct resource resources_nand[] = {
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