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ARM64: dts: rockchip: add emmc, sdio and sdmmc node for rk3399

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This patch add emmc, sdio and sdmmc node to support
mmc stuff on rk3399 platform.

Change-Id: I717855dded5f5161127ba29e34b9ff2106009c55
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
This commit is contained in:
Shawn Lin
2016-03-15 16:12:25 +08:00
committed by Huang, Tao
parent a102978d92
commit a268d44bf0
1 changed files with 43 additions and 0 deletions
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43
arch/arm64/boot/dts/rockchip/rk3399.dtsi
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@@ -303,6 +303,49 @@
status = "disabled";
};
emmc_phy: phy {
compatible = "rockchip,rk3399-emmc-phy";
reg-offset = <0xf780>;
#phy-cells = <0>;
rockchip,grf = <&grf>;
status = "disabled";
};
sdio0: dwmmc@fe310000 {
compatible = "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xfe310000 0x0 0x4000>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
clock-freq-min-max = <400000 150000000>;
clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
status = "disabled";
};
sdmmc: dwmmc@fe320000 {
compatible = "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xfe320000 0x0 0x4000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
clock-freq-min-max = <400000 150000000>;
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
status = "disabled";
};
sdhci: sdhci@fe330000 {
compatible = "arasan,sdhci-5.1";
reg = <0x0 0xfe330000 0x0 0x10000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;
clock-names = "clk_xin", "clk_ahb";
phys = <&emmc_phy>;
phy-names = "phy_arasan";
status = "disabled";
};
uart0: serial@ff180000 {
compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart";
reg = <0x0 0xff180000 0x0 0x100>;