shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-07 11:26:02 +09:00
Code Issues Packages Projects Releases Wiki Activity

arm64: dts: mt8195: add jpeg encode device node

Browse Source 
add mt8195 jpegenc device node

Signed-off-by: kyrie wu <kyrie.wu@mediatek.com>
Signed-off-by: irui wang <irui.wang@mediatek.com>
Link: https://lore.kernel.org/r/20230112084503.4277-2-irui.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
kyrie wu
2023-01-12 16:45:02 +08:00
committed by Matthias Brugger
parent 8622f5c63e
commit a32a371f90
1 changed files with 40 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

40
arch/arm64/boot/dts/mediatek/mt8195.dtsi
View File

@@ -2318,6 +2318,46 @@
#clock-cells = <1>;
};
jpgenc-master {
compatible = "mediatek,mt8195-jpgenc";
power-domains = <&spm MT8195_POWER_DOMAIN_VENC_CORE1>;
iommus = <&iommu_vpp M4U_PORT_L20_JPGENC_Y_RDMA>,
<&iommu_vpp M4U_PORT_L20_JPGENC_C_RDMA>,
<&iommu_vpp M4U_PORT_L20_JPGENC_Q_TABLE>,
<&iommu_vpp M4U_PORT_L20_JPGENC_BSDMA>;
dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
jpgenc@1a030000 {
compatible = "mediatek,mt8195-jpgenc-hw";
reg = <0 0x1a030000 0 0x10000>;
iommus = <&iommu_vdo M4U_PORT_L19_JPGENC_Y_RDMA>,
<&iommu_vdo M4U_PORT_L19_JPGENC_C_RDMA>,
<&iommu_vdo M4U_PORT_L19_JPGENC_Q_TABLE>,
<&iommu_vdo M4U_PORT_L19_JPGENC_BSDMA>;
interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&vencsys CLK_VENC_JPGENC>;
clock-names = "jpgenc";
power-domains = <&spm MT8195_POWER_DOMAIN_VENC>;
};
jpgenc@1b030000 {
compatible = "mediatek,mt8195-jpgenc-hw";
reg = <0 0x1b030000 0 0x10000>;
iommus = <&iommu_vpp M4U_PORT_L20_JPGENC_Y_RDMA>,
<&iommu_vpp M4U_PORT_L20_JPGENC_C_RDMA>,
<&iommu_vpp M4U_PORT_L20_JPGENC_Q_TABLE>,
<&iommu_vpp M4U_PORT_L20_JPGENC_BSDMA>;
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&vencsys_core1 CLK_VENC_CORE1_JPGENC>;
clock-names = "jpgenc";
power-domains = <&spm MT8195_POWER_DOMAIN_VENC_CORE1>;
};
};
larb20: larb@1b010000 {
compatible = "mediatek,mt8195-smi-larb";
reg = <0 0x1b010000 0 0x1000>;