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ARM: tegra: clock: Fix cpu pll table entry for 608MHz
The 608 MHz table entry would incorrectly produce a 760 MHz clock for input clocks of 12 MHz, 13 MHz, or 26 MHz. Change-Id: I6755fdde88f0851770490818dc2e5e1e2d512f20 Signed-off-by: Colin Cross <ccross@android.com>
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@@ -1534,10 +1534,10 @@ static struct clk_pll_freq_table tegra_pll_x_freq_table[] = {
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{ 26000000, 760000000, 760, 26, 1, 12},
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/* 608 MHz */
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{ 12000000, 608000000, 760, 12, 1, 12},
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{ 13000000, 608000000, 760, 13, 1, 12},
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{ 12000000, 608000000, 608, 12, 1, 12},
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{ 13000000, 608000000, 608, 13, 1, 12},
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{ 19200000, 608000000, 380, 12, 1, 8},
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{ 26000000, 608000000, 760, 26, 1, 12},
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{ 26000000, 608000000, 608, 26, 1, 12},
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/* 456 MHz */
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{ 12000000, 456000000, 456, 12, 1, 12},
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