ARM: tegra: clock: Fix cpu pll table entry for 608MHz

The 608 MHz table entry would incorrectly produce a 760 MHz
clock for input clocks of 12 MHz, 13 MHz, or 26 MHz.

Change-Id: I6755fdde88f0851770490818dc2e5e1e2d512f20
Signed-off-by: Colin Cross <ccross@android.com>
This commit is contained in:
Colin Cross
2010-11-24 14:56:34 -08:00
parent 6236e32391
commit a4c245e920

View File

@@ -1534,10 +1534,10 @@ static struct clk_pll_freq_table tegra_pll_x_freq_table[] = {
{ 26000000, 760000000, 760, 26, 1, 12},
/* 608 MHz */
{ 12000000, 608000000, 760, 12, 1, 12},
{ 13000000, 608000000, 760, 13, 1, 12},
{ 12000000, 608000000, 608, 12, 1, 12},
{ 13000000, 608000000, 608, 13, 1, 12},
{ 19200000, 608000000, 380, 12, 1, 8},
{ 26000000, 608000000, 760, 26, 1, 12},
{ 26000000, 608000000, 608, 26, 1, 12},
/* 456 MHz */
{ 12000000, 456000000, 456, 12, 1, 12},