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ASoC: rockchip: i2s: Use DMC-DVFS-SCENE for HBR audio

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This patch Use DMC-DVFS-SCENE policy for High Bitrate Audio.

Ref: commit 5f0eb1c57240 ("ASoC: rockchip: Introduce rockchip utils common API")

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I9492fa993b6095f53f253615304ec445ac9cb53f
This commit is contained in:
Sugar Zhang
2023-10-15 18:13:23 +08:00
committed by Tao Huang
parent adb52b6600
commit a4f964d7fc
2 changed files with 39 additions and 4 deletions
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31
sound/soc/rockchip/rockchip_i2s.c
View File

@@ -22,6 +22,7 @@
#include "rockchip_i2s.h"
#include "rockchip_dlp_pcm.h"
#include "rockchip_utils.h"
#define DRV_NAME "rockchip-i2s"
@@ -334,6 +335,25 @@ err_pm_put:
return ret;
}
static void rockchip_i2s_get_performance(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai,
unsigned int csr)
{
struct rk_i2s_dev *i2s = to_info(dai);
unsigned int tdl;
int fifo;
regmap_read(i2s->regmap, I2S_DMACR, &tdl);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
fifo = I2S_DMACR_TDL_V(tdl) * I2S_TXCR_CSR_V(csr);
else
fifo = I2S_DMACR_RDL_V(tdl) * I2S_RXCR_CSR_V(csr);
rockchip_utils_get_performance(substream, params, dai, fifo);
}
static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
@@ -401,6 +421,8 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
return -EINVAL;
}
rockchip_i2s_get_performance(substream, params, dai, val);
if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
regmap_update_bits(i2s->regmap, I2S_RXCR,
I2S_RXCR_VDW_MASK | I2S_RXCR_CSR_MASK,
@@ -442,6 +464,14 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
return 0;
}
static int rockchip_i2s_hw_free(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
rockchip_utils_put_performance(substream, dai);
return 0;
}
static int rockchip_i2s_trigger(struct snd_pcm_substream *substream,
int cmd, struct snd_soc_dai *dai)
{
@@ -647,6 +677,7 @@ static const struct snd_soc_dai_ops rockchip_i2s_dai_ops = {
.startup = rockchip_i2s_startup,
.shutdown = rockchip_i2s_shutdown,
.hw_params = rockchip_i2s_hw_params,
.hw_free = rockchip_i2s_hw_free,
.set_bclk_ratio = rockchip_i2s_set_bclk_ratio,
.set_sysclk = rockchip_i2s_set_sysclk,
.set_fmt = rockchip_i2s_set_fmt,

12
sound/soc/rockchip/rockchip_i2s.h
View File

@@ -18,8 +18,9 @@
#define I2S_TXCR_RCNT_SHIFT 17
#define I2S_TXCR_RCNT_MASK (0x3f << I2S_TXCR_RCNT_SHIFT)
#define I2S_TXCR_CSR_SHIFT 15
#define I2S_TXCR_CSR(x) (x << I2S_TXCR_CSR_SHIFT)
#define I2S_TXCR_CSR_MASK (3 << I2S_TXCR_CSR_SHIFT)
#define I2S_TXCR_CSR(x) (x << I2S_TXCR_CSR_SHIFT)
#define I2S_TXCR_CSR_V(v) ((((v) & I2S_TXCR_CSR_MASK) >> 15) + 1)
#define I2S_TXCR_HWT BIT(14)
#define I2S_TXCR_SJM_SHIFT 12
#define I2S_TXCR_SJM_R (0 << I2S_TXCR_SJM_SHIFT)
@@ -48,8 +49,9 @@
* receive operation control register
*/
#define I2S_RXCR_CSR_SHIFT 15
#define I2S_RXCR_CSR(x) (x << I2S_RXCR_CSR_SHIFT)
#define I2S_RXCR_CSR_MASK (3 << I2S_RXCR_CSR_SHIFT)
#define I2S_RXCR_CSR(x) (x << I2S_RXCR_CSR_SHIFT)
#define I2S_RXCR_CSR_V(v) ((((v) & I2S_RXCR_CSR_MASK) >> 15) + 1)
#define I2S_RXCR_HWT BIT(14)
#define I2S_RXCR_SJM_SHIFT 12
#define I2S_RXCR_SJM_R (0 << I2S_RXCR_SJM_SHIFT)
@@ -132,14 +134,16 @@
#define I2S_DMACR_RDE_DISABLE (0 << I2S_DMACR_RDE_SHIFT)
#define I2S_DMACR_RDE_ENABLE (1 << I2S_DMACR_RDE_SHIFT)
#define I2S_DMACR_RDL_SHIFT 16
#define I2S_DMACR_RDL(x) ((x - 1) << I2S_DMACR_RDL_SHIFT)
#define I2S_DMACR_RDL_MASK (0x1f << I2S_DMACR_RDL_SHIFT)
#define I2S_DMACR_RDL(x) ((x - 1) << I2S_DMACR_RDL_SHIFT)
#define I2S_DMACR_RDL_V(v) ((((v) & I2S_DMACR_RDL_MASK) >> 16) + 1)
#define I2S_DMACR_TDE_SHIFT 8
#define I2S_DMACR_TDE_DISABLE (0 << I2S_DMACR_TDE_SHIFT)
#define I2S_DMACR_TDE_ENABLE (1 << I2S_DMACR_TDE_SHIFT)
#define I2S_DMACR_TDL_SHIFT 0
#define I2S_DMACR_TDL(x) ((x) << I2S_DMACR_TDL_SHIFT)
#define I2S_DMACR_TDL_MASK (0x1f << I2S_DMACR_TDL_SHIFT)
#define I2S_DMACR_TDL(x) ((x) << I2S_DMACR_TDL_SHIFT)
#define I2S_DMACR_TDL_V(v) (((v) & I2S_DMACR_TDL_MASK) >> 0)
/*
* INTCR