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usb: dts: set otg switch for board axg

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PD#142470: set otg switch for board axg

Change-Id: I97500402a2747910d82b9928a55419d35ce2f826
Signed-off-by: Yue Wang <yue.wang@amlogic.com>
This commit is contained in:
Yue Wang
2017-05-12 14:52:39 +08:00
committed by Victor Wan
parent a417b7a6e4
commit a524ac609f
3 changed files with 170 additions and 0 deletions
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58
arch/arm64/boot/dts/amlogic/axg_a113d_skt.dts
View File

@@ -56,6 +56,64 @@
};
};
dwc3: dwc3@ff500000 {
compatible = "synopsys, dwc3";
status = "okay";
reg = <0x0 0xff500000 0x0 0x100000>;
interrupts = <0 30 4>;
usb-phy = <&usb2_phy>, <&usb3_phy>;
cpu-type = "gxl";
clock-src = "usb3.0";
};
usb2_phy: usb2phy@ffe09000 {
compatible = "amlogic, amlogic-new-usb2";
status = "okay";
portnum = <4>;
reg = <0x0 0xffe09000 0x0 0x80>;
};
usb3_phy: usb3phy@ffe09080 {
compatible = "amlogic, amlogic-new-usb3";
status = "okay";
portnum = <0>;
reg = <0x0 0xffe09080 0x0 0x20>;
interrupts = <0 16 4>;
otg = <1>;
gpio-vbus-power = "GPIOAO_5";
gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
};
dwc2_a {
compatible = "amlogic, dwc2";
device_name = "dwc2_a";
reg = <0x0 0xff400000 0x0 0x40000>;
status = "okay";
interrupts = <0 31 4>;
pl-periph-id = <0>; /** lm name */
clock-src = "usb0"; /** clock src */
port-id = <0>; /** ref to mach/usb.h */
port-type = <2>; /** 0: otg, 1: host, 2: slave */
port-speed = <0>; /** 0: default, high, 1: full */
port-config = <0>; /** 0: default */
/*0:default,1:single,2:incr,3:incr4,4:incr8,5:incr16,6:disable*/
port-dma = <0>;
port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
usb-fifo = <728>;
cpu-type = "gxl";
/** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
controller-type = <3>;
phy-reg = <0xffe09000>;
phy-reg-size = <0xa0>;
clocks = <&clkc CLKID_USB_GENERAL
&clkc CLKID_USB1_TO_DDR
&clkc CLKID_USB1>;
clock-names = "usb_general",
"usb1",
"usb1_to_ddr";
};
pcie_A: pcieA@f9800000 {
compatible = "amlogic, amlogic-pcie", "snps,dw-pcie";
reg = <0x0 0xf9800000 0x0 0x400000

57
arch/arm64/boot/dts/amlogic/axg_s400.dts
View File

@@ -56,6 +56,63 @@
};
};
dwc3: dwc3@ff500000 {
compatible = "synopsys, dwc3";
status = "okay";
reg = <0x0 0xff500000 0x0 0x100000>;
interrupts = <0 30 4>;
usb-phy = <&usb2_phy>, <&usb3_phy>;
cpu-type = "gxl";
clock-src = "usb3.0";
};
usb2_phy: usb2phy@ffe09000 {
compatible = "amlogic, amlogic-new-usb2";
status = "okay";
portnum = <4>;
reg = <0x0 0xffe09000 0x0 0x80>;
};
usb3_phy: usb3phy@ffe09080 {
compatible = "amlogic, amlogic-new-usb3";
status = "okay";
portnum = <0>;
reg = <0x0 0xffe09080 0x0 0x20>;
interrupts = <0 16 4>;
otg = <1>;
gpio-vbus-power = "GPIOAO_5";
gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
};
dwc2_a {
compatible = "amlogic, dwc2";
device_name = "dwc2_a";
reg = <0x0 0xff400000 0x0 0x40000>;
status = "okay";
interrupts = <0 31 4>;
pl-periph-id = <0>; /** lm name */
clock-src = "usb0"; /** clock src */
port-id = <0>; /** ref to mach/usb.h */
port-type = <2>; /** 0: otg, 1: host, 2: slave */
port-speed = <0>; /** 0: default, high, 1: full */
port-config = <0>; /** 0: default */
/*0:default,1:single,2:incr,3:incr4,4:incr8,5:incr16,6:disable*/
port-dma = <0>;
port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
usb-fifo = <728>;
cpu-type = "gxl";
/** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
controller-type = <3>;
phy-reg = <0xffe09000>;
phy-reg-size = <0xa0>;
clocks = <&clkc CLKID_USB_GENERAL
&clkc CLKID_USB1_TO_DDR
&clkc CLKID_USB1>;
clock-names = "usb_general",
"usb1",
"usb1_to_ddr";
};
pcie_A: pcieA@f9800000 {
compatible = "amlogic, amlogic-pcie", "snps,dw-pcie";
reg = <0x0 0xf9800000 0x0 0x400000

55
arch/arm64/boot/dts/amlogic/axg_s420.dts
View File

@@ -56,6 +56,61 @@
};
};
dwc3: dwc3@ff500000 {
compatible = "synopsys, dwc3";
status = "okay";
reg = <0x0 0xff500000 0x0 0x100000>;
interrupts = <0 30 4>;
usb-phy = <&usb2_phy>, <&usb3_phy>;
cpu-type = "gxl";
clock-src = "usb3.0";
};
usb2_phy: usb2phy@ffe09000 {
compatible = "amlogic, amlogic-new-usb2";
status = "okay";
portnum = <4>;
reg = <0x0 0xffe09000 0x0 0x80>;
};
usb3_phy: usb3phy@ffe09080 {
compatible = "amlogic, amlogic-new-usb3";
status = "okay";
portnum = <0>;
reg = <0x0 0xffe09080 0x0 0x20>;
interrupts = <0 16 4>;
otg = <1>;
gpio-vbus-power = "GPIOAO_5";
gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
};
dwc2_a {
compatible = "amlogic, dwc2";
device_name = "dwc2_a";
reg = <0x0 0xff400000 0x0 0x40000>;
status = "okay";
interrupts = <0 31 4>;
pl-periph-id = <0>; /** lm name */
clock-src = "usb0"; /** clock src */
port-id = <0>; /** ref to mach/usb.h */
port-type = <2>; /** 0: otg, 1: host, 2: slave */
port-speed = <0>; /** 0: default, high, 1: full */
port-config = <0>; /** 0: default */
/*0:default,1:single,2:incr,3:incr4,4:incr8,5:incr16,6:disable*/
port-dma = <0>;
port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
usb-fifo = <728>;
cpu-type = "gxl";
/** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
controller-type = <3>;
phy-reg = <0xffe09000>;
phy-reg-size = <0xa0>;
clocks = <&clkc CLKID_USB_GENERAL
&clkc CLKID_USB1_TO_DDR
&clkc CLKID_USB1>;
clock-names = "usb_general",
"usb1",
"usb1_to_ddr";
};
}; /* end of / */