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arm64: dts: qcom: qcm2290: declare VLS CLAMP register for USB3 PHY

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[ Upstream commit acb94d67f5a23dbb2e0021b6c30609ed05d7d6a5 ]

The USB3 PHY on the QCM2290 platform doesn't have built-in
PCS_MISC_CLAMP_ENABLE register. Instead clamping is handled separately
via the register in the TCSR space. Declare corresponding register.

Fixes: 0c55f6229b ("arm64: dts: qcom: qcm2290: Add USB3 PHY")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240117-usbc-phy-vls-clamp-v2-5-a950c223f10f@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Dmitry Baryshkov
2024-01-17 16:04:26 +02:00
committed by Sasha Levin
parent 3a71ec74e5
commit a535c7198b
1 changed files with 7 additions and 0 deletions
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7
arch/arm64/boot/dts/qcom/qcm2290.dtsi
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@@ -418,6 +418,11 @@
#hwlock-cells = <1>;
};
tcsr_regs: syscon@3c0000 {
compatible = "qcom,qcm2290-tcsr", "syscon";
reg = <0x0 0x003c0000 0x0 0x40000>;
};
tlmm: pinctrl@500000 {
compatible = "qcom,qcm2290-tlmm";
reg = <0x0 0x00500000 0x0 0x300000>;
@@ -665,6 +670,8 @@
#phy-cells = <0>;
qcom,tcsr-reg = <&tcsr_regs 0xb244>;
status = "disabled";
};