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perf/x86/intel: Use PAGE_SIZE for PEBS buffer size on Core2
commit e72daf3f4d upstream.
Using PAGE_SIZE buffers makes the WRMSR to PERF_GLOBAL_CTRL in
intel_pmu_enable_all() mysteriously hang on Core2. As a workaround, we
don't do this.
The hard lockup is easily triggered by running 'perf test attr'
repeatedly. Most of the time it gets stuck on sample session with
small periods.
# perf test attr -vv
14: struct perf_event_attr setup :
--- start ---
...
'PERF_TEST_ATTR=/tmp/tmpuEKz3B /usr/bin/perf record -o /tmp/tmpuEKz3B/perf.data -c 123 kill >/dev/null 2>&1' ret 1
Reported-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Jiri Olsa <jolsa@kernel.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kan Liang <kan.liang@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: Wang Nan <wangnan0@huawei.com>
Link: http://lkml.kernel.org/r/20160301190352.GA8355@krava.redhat.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
886629ebb2
commit
a54af124cd
@@ -591,6 +591,7 @@ struct x86_pmu {
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pebs_active :1,
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pebs_broken :1;
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int pebs_record_size;
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int pebs_buffer_size;
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void (*drain_pebs)(struct pt_regs *regs);
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struct event_constraint *pebs_constraints;
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void (*pebs_aliases)(struct perf_event *event);
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@@ -269,7 +269,7 @@ static int alloc_pebs_buffer(int cpu)
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if (!x86_pmu.pebs)
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return 0;
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buffer = kzalloc_node(PEBS_BUFFER_SIZE, GFP_KERNEL, node);
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buffer = kzalloc_node(x86_pmu.pebs_buffer_size, GFP_KERNEL, node);
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if (unlikely(!buffer))
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return -ENOMEM;
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@@ -286,7 +286,7 @@ static int alloc_pebs_buffer(int cpu)
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per_cpu(insn_buffer, cpu) = ibuffer;
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}
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max = PEBS_BUFFER_SIZE / x86_pmu.pebs_record_size;
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max = x86_pmu.pebs_buffer_size / x86_pmu.pebs_record_size;
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ds->pebs_buffer_base = (u64)(unsigned long)buffer;
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ds->pebs_index = ds->pebs_buffer_base;
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@@ -1296,6 +1296,7 @@ void __init intel_ds_init(void)
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x86_pmu.bts = boot_cpu_has(X86_FEATURE_BTS);
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x86_pmu.pebs = boot_cpu_has(X86_FEATURE_PEBS);
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x86_pmu.pebs_buffer_size = PEBS_BUFFER_SIZE;
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if (x86_pmu.pebs) {
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char pebs_type = x86_pmu.intel_cap.pebs_trap ? '+' : '-';
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int format = x86_pmu.intel_cap.pebs_format;
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@@ -1304,6 +1305,14 @@ void __init intel_ds_init(void)
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case 0:
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printk(KERN_CONT "PEBS fmt0%c, ", pebs_type);
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x86_pmu.pebs_record_size = sizeof(struct pebs_record_core);
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/*
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* Using >PAGE_SIZE buffers makes the WRMSR to
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* PERF_GLOBAL_CTRL in intel_pmu_enable_all()
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* mysteriously hang on Core2.
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*
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* As a workaround, we don't do this.
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*/
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x86_pmu.pebs_buffer_size = PAGE_SIZE;
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x86_pmu.drain_pebs = intel_pmu_drain_pebs_core;
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break;
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