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clk: clock: meet spicc clk closest and not include 1G

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PD#164751: clock: fix set spi clock set error

Change-Id: I06b9c195441e7b057dbd9bf7d5b864cf8ae44aa1
Signed-off-by: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
This commit is contained in:
Shunzhou Jiang
2018-06-25 16:58:41 +08:00
committed by Yixun Lan
parent 2d2870dd3f
commit a66b3c3abc
1 changed files with 4 additions and 2 deletions
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6
drivers/amlogic/clk/g12a/g12a_clk_misc.c
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@@ -56,8 +56,8 @@ static struct clk_gate g12a_ts_clk_gate = {
};
static const char * const spicc_parent_names[] = { "xtal",
"clk81", "fclk_div4", "fclk_div3", "fclk_div2", "fclk_div5",
"fclk_div7", "gp0_pll"};
"clk81", "fclk_div4", "fclk_div3", "", "fclk_div5",
"fclk_div7", ""};
/* spicc clk */
static struct clk_mux g12a_spicc0_mux = {
@@ -79,6 +79,7 @@ static struct clk_divider g12a_spicc0_div = {
.shift = 0,
.width = 6,
.lock = &clk_lock,
.flags = CLK_DIVIDER_ROUND_CLOSEST,
.hw.init = &(struct clk_init_data){
.name = "spicc0_div",
.ops = &clk_divider_ops,
@@ -120,6 +121,7 @@ static struct clk_divider g12a_spicc1_div = {
.shift = 16,
.width = 6,
.lock = &clk_lock,
.flags = CLK_DIVIDER_ROUND_CLOSEST,
.hw.init = &(struct clk_init_data){
.name = "spicc_p1_div",
.ops = &clk_divider_ops,