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PCI: aspm_ext: Re-enable LRT for L1SS after power loss

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Change-Id: Iedb72ee74660a8f11f38895e06766c3b77728ba3
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
This commit is contained in:
Jon Lin
2022-06-24 21:32:11 +08:00
committed by Tao Huang
parent 9c75f9ae0a
commit a6c71606de
1 changed files with 4 additions and 0 deletions
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4
drivers/pci/pcie/aspm_ext.c
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@@ -322,6 +322,10 @@ void pcie_aspm_ext_l1ss_enable(struct pci_dev *child, struct pci_dev *parent, bo
ret = rockchip_pcie_bus_aspm_enable_rc_ep(child, parent, false);
if (enable) {
/* LRT enable bits loss after wifi off, enable it after power on */
if (parent->ltr_path)
pcie_capability_set_word(parent, PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_LTR_EN);
/* Enable RC then EP */
aspm_calc_l1ss_info(child, parent);
rockchip_pcie_bus_l1ss_enable_dev("RC", parent, enable);