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https://github.com/hardkernel/linux.git
synced 2026-05-03 18:55:31 +09:00
staging: ccree: fix ivgen naming convention
The ivgen files were using a func naming convention which was inconsistent (ssi vs. cc), included a long prefix (ssi_ivgen) and often too long. Make the code more readable by switching to a simpler, consistent naming convention. Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
200f806475
commit
a6df50dc0b
@@ -344,9 +344,9 @@ static int init_cc_resources(struct platform_device *plat_dev)
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goto post_buf_mgr_err;
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}
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rc = ssi_ivgen_init(new_drvdata);
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rc = cc_ivgen_init(new_drvdata);
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if (rc) {
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dev_err(dev, "ssi_ivgen_init failed\n");
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dev_err(dev, "cc_ivgen_init failed\n");
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goto post_power_mgr_err;
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}
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@@ -383,7 +383,7 @@ post_hash_err:
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post_cipher_err:
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cc_cipher_free(new_drvdata);
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post_ivgen_err:
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ssi_ivgen_fini(new_drvdata);
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cc_ivgen_fini(new_drvdata);
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post_power_mgr_err:
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cc_pm_fini(new_drvdata);
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post_buf_mgr_err:
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@@ -419,7 +419,7 @@ static void cleanup_cc_resources(struct platform_device *plat_dev)
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cc_aead_free(drvdata);
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cc_hash_free(drvdata);
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cc_cipher_free(drvdata);
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ssi_ivgen_fini(drvdata);
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cc_ivgen_fini(drvdata);
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cc_pm_fini(drvdata);
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cc_buffer_mgr_fini(drvdata);
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cc_req_mgr_fini(drvdata);
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@@ -24,15 +24,15 @@
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#include "ssi_buffer_mgr.h"
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/* The max. size of pool *MUST* be <= SRAM total size */
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#define SSI_IVPOOL_SIZE 1024
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#define CC_IVPOOL_SIZE 1024
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/* The first 32B fraction of pool are dedicated to the
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* next encryption "key" & "IV" for pool regeneration
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*/
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#define SSI_IVPOOL_META_SIZE (CC_AES_IV_SIZE + AES_KEYSIZE_128)
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#define SSI_IVPOOL_GEN_SEQ_LEN 4
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#define CC_IVPOOL_META_SIZE (CC_AES_IV_SIZE + AES_KEYSIZE_128)
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#define CC_IVPOOL_GEN_SEQ_LEN 4
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/**
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* struct ssi_ivgen_ctx -IV pool generation context
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* struct cc_ivgen_ctx -IV pool generation context
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* @pool: the start address of the iv-pool resides in internal RAM
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* @ctr_key_dma: address of pool's encryption key material in internal RAM
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* @ctr_iv_dma: address of pool's counter iv in internal RAM
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@@ -40,7 +40,7 @@
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* @pool_meta: virt. address of the initial enc. key/IV
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* @pool_meta_dma: phys. address of the initial enc. key/IV
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*/
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struct ssi_ivgen_ctx {
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struct cc_ivgen_ctx {
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ssi_sram_addr_t pool;
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ssi_sram_addr_t ctr_key;
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ssi_sram_addr_t ctr_iv;
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@@ -50,21 +50,21 @@ struct ssi_ivgen_ctx {
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};
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/*!
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* Generates SSI_IVPOOL_SIZE of random bytes by
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* Generates CC_IVPOOL_SIZE of random bytes by
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* encrypting 0's using AES128-CTR.
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*
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* \param ivgen iv-pool context
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* \param iv_seq IN/OUT array to the descriptors sequence
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* \param iv_seq_len IN/OUT pointer to the sequence length
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*/
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static int ssi_ivgen_generate_pool(
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struct ssi_ivgen_ctx *ivgen_ctx,
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static int cc_gen_iv_pool(
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struct cc_ivgen_ctx *ivgen_ctx,
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struct cc_hw_desc iv_seq[],
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unsigned int *iv_seq_len)
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{
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unsigned int idx = *iv_seq_len;
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if ((*iv_seq_len + SSI_IVPOOL_GEN_SEQ_LEN) > SSI_IVPOOL_SEQ_LEN) {
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if ((*iv_seq_len + CC_IVPOOL_GEN_SEQ_LEN) > SSI_IVPOOL_SEQ_LEN) {
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/* The sequence will be longer than allowed */
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return -EINVAL;
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}
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@@ -97,15 +97,15 @@ static int ssi_ivgen_generate_pool(
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/* Generate IV pool */
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hw_desc_init(&iv_seq[idx]);
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set_din_const(&iv_seq[idx], 0, SSI_IVPOOL_SIZE);
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set_dout_sram(&iv_seq[idx], ivgen_ctx->pool, SSI_IVPOOL_SIZE);
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set_din_const(&iv_seq[idx], 0, CC_IVPOOL_SIZE);
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set_dout_sram(&iv_seq[idx], ivgen_ctx->pool, CC_IVPOOL_SIZE);
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set_flow_mode(&iv_seq[idx], DIN_AES_DOUT);
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idx++;
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*iv_seq_len = idx; /* Update sequence length */
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/* queue ordering assures pool readiness */
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ivgen_ctx->next_iv_ofs = SSI_IVPOOL_META_SIZE;
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ivgen_ctx->next_iv_ofs = CC_IVPOOL_META_SIZE;
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return 0;
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}
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@@ -118,15 +118,15 @@ static int ssi_ivgen_generate_pool(
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*
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* \return int Zero for success, negative value otherwise.
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*/
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int ssi_ivgen_init_sram_pool(struct ssi_drvdata *drvdata)
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int cc_init_iv_sram(struct ssi_drvdata *drvdata)
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{
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struct ssi_ivgen_ctx *ivgen_ctx = drvdata->ivgen_handle;
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struct cc_ivgen_ctx *ivgen_ctx = drvdata->ivgen_handle;
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struct cc_hw_desc iv_seq[SSI_IVPOOL_SEQ_LEN];
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unsigned int iv_seq_len = 0;
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int rc;
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/* Generate initial enc. key/iv */
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get_random_bytes(ivgen_ctx->pool_meta, SSI_IVPOOL_META_SIZE);
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get_random_bytes(ivgen_ctx->pool_meta, CC_IVPOOL_META_SIZE);
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/* The first 32B reserved for the enc. Key/IV */
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ivgen_ctx->ctr_key = ivgen_ctx->pool;
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@@ -135,14 +135,14 @@ int ssi_ivgen_init_sram_pool(struct ssi_drvdata *drvdata)
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/* Copy initial enc. key and IV to SRAM at a single descriptor */
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hw_desc_init(&iv_seq[iv_seq_len]);
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set_din_type(&iv_seq[iv_seq_len], DMA_DLLI, ivgen_ctx->pool_meta_dma,
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SSI_IVPOOL_META_SIZE, NS_BIT);
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CC_IVPOOL_META_SIZE, NS_BIT);
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set_dout_sram(&iv_seq[iv_seq_len], ivgen_ctx->pool,
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SSI_IVPOOL_META_SIZE);
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CC_IVPOOL_META_SIZE);
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set_flow_mode(&iv_seq[iv_seq_len], BYPASS);
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iv_seq_len++;
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/* Generate initial pool */
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rc = ssi_ivgen_generate_pool(ivgen_ctx, iv_seq, &iv_seq_len);
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rc = cc_gen_iv_pool(ivgen_ctx, iv_seq, &iv_seq_len);
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if (rc)
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return rc;
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@@ -155,17 +155,17 @@ int ssi_ivgen_init_sram_pool(struct ssi_drvdata *drvdata)
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*
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* \param drvdata
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*/
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void ssi_ivgen_fini(struct ssi_drvdata *drvdata)
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void cc_ivgen_fini(struct ssi_drvdata *drvdata)
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{
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struct ssi_ivgen_ctx *ivgen_ctx = drvdata->ivgen_handle;
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struct cc_ivgen_ctx *ivgen_ctx = drvdata->ivgen_handle;
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struct device *device = &drvdata->plat_dev->dev;
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if (!ivgen_ctx)
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return;
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if (ivgen_ctx->pool_meta) {
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memset(ivgen_ctx->pool_meta, 0, SSI_IVPOOL_META_SIZE);
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dma_free_coherent(device, SSI_IVPOOL_META_SIZE,
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memset(ivgen_ctx->pool_meta, 0, CC_IVPOOL_META_SIZE);
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dma_free_coherent(device, CC_IVPOOL_META_SIZE,
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ivgen_ctx->pool_meta,
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ivgen_ctx->pool_meta_dma);
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}
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@@ -184,9 +184,9 @@ void ssi_ivgen_fini(struct ssi_drvdata *drvdata)
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*
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* \return int Zero for success, negative value otherwise.
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*/
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int ssi_ivgen_init(struct ssi_drvdata *drvdata)
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int cc_ivgen_init(struct ssi_drvdata *drvdata)
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{
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struct ssi_ivgen_ctx *ivgen_ctx;
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struct cc_ivgen_ctx *ivgen_ctx;
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struct device *device = &drvdata->plat_dev->dev;
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int rc;
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@@ -199,27 +199,27 @@ int ssi_ivgen_init(struct ssi_drvdata *drvdata)
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ivgen_ctx = drvdata->ivgen_handle;
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/* Allocate pool's header for initial enc. key/IV */
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ivgen_ctx->pool_meta = dma_alloc_coherent(device, SSI_IVPOOL_META_SIZE,
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ivgen_ctx->pool_meta = dma_alloc_coherent(device, CC_IVPOOL_META_SIZE,
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&ivgen_ctx->pool_meta_dma,
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GFP_KERNEL);
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if (!ivgen_ctx->pool_meta) {
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dev_err(device, "Not enough memory to allocate DMA of pool_meta (%u B)\n",
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SSI_IVPOOL_META_SIZE);
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CC_IVPOOL_META_SIZE);
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rc = -ENOMEM;
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goto out;
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}
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/* Allocate IV pool in SRAM */
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ivgen_ctx->pool = cc_sram_alloc(drvdata, SSI_IVPOOL_SIZE);
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ivgen_ctx->pool = cc_sram_alloc(drvdata, CC_IVPOOL_SIZE);
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if (ivgen_ctx->pool == NULL_SRAM_ADDR) {
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dev_err(device, "SRAM pool exhausted\n");
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rc = -ENOMEM;
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goto out;
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}
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return ssi_ivgen_init_sram_pool(drvdata);
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return cc_init_iv_sram(drvdata);
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out:
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ssi_ivgen_fini(drvdata);
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cc_ivgen_fini(drvdata);
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return rc;
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}
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@@ -236,7 +236,7 @@ out:
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*
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* \return int Zero for success, negative value otherwise.
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*/
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int ssi_ivgen_getiv(
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int cc_get_iv(
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struct ssi_drvdata *drvdata,
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dma_addr_t iv_out_dma[],
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unsigned int iv_out_dma_len,
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@@ -244,7 +244,7 @@ int ssi_ivgen_getiv(
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struct cc_hw_desc iv_seq[],
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unsigned int *iv_seq_len)
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{
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struct ssi_ivgen_ctx *ivgen_ctx = drvdata->ivgen_handle;
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struct cc_ivgen_ctx *ivgen_ctx = drvdata->ivgen_handle;
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unsigned int idx = *iv_seq_len;
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struct device *dev = drvdata_to_dev(drvdata);
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unsigned int t;
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@@ -291,10 +291,10 @@ int ssi_ivgen_getiv(
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/* Update iv index */
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ivgen_ctx->next_iv_ofs += iv_out_size;
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if ((SSI_IVPOOL_SIZE - ivgen_ctx->next_iv_ofs) < CC_AES_IV_SIZE) {
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if ((CC_IVPOOL_SIZE - ivgen_ctx->next_iv_ofs) < CC_AES_IV_SIZE) {
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dev_dbg(dev, "Pool exhausted, regenerating iv-pool\n");
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/* pool is drained -regenerate it! */
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return ssi_ivgen_generate_pool(ivgen_ctx, iv_seq, iv_seq_len);
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return cc_gen_iv_pool(ivgen_ctx, iv_seq, iv_seq_len);
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}
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return 0;
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@@ -29,14 +29,14 @@
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*
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* \return int Zero for success, negative value otherwise.
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*/
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int ssi_ivgen_init(struct ssi_drvdata *drvdata);
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int cc_ivgen_init(struct ssi_drvdata *drvdata);
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/*!
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* Free iv-pool and ivgen context.
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*
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* \param drvdata
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*/
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void ssi_ivgen_fini(struct ssi_drvdata *drvdata);
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void cc_ivgen_fini(struct ssi_drvdata *drvdata);
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/*!
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* Generates the initial pool in SRAM.
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@@ -46,7 +46,7 @@ void ssi_ivgen_fini(struct ssi_drvdata *drvdata);
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*
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* \return int Zero for success, negative value otherwise.
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*/
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int ssi_ivgen_init_sram_pool(struct ssi_drvdata *drvdata);
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int cc_init_iv_sram(struct ssi_drvdata *drvdata);
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/*!
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* Acquires 16 Bytes IV from the iv-pool
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@@ -61,7 +61,7 @@ int ssi_ivgen_init_sram_pool(struct ssi_drvdata *drvdata);
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*
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* \return int Zero for success, negative value otherwise.
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*/
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int ssi_ivgen_getiv(
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int cc_get_iv(
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struct ssi_drvdata *drvdata,
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dma_addr_t iv_out_dma[],
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unsigned int iv_out_dma_len,
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@@ -81,7 +81,7 @@ int cc_pm_resume(struct device *dev)
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/* must be after the queue resuming as it uses the HW queue*/
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cc_init_hash_sram(drvdata);
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ssi_ivgen_init_sram_pool(drvdata);
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cc_init_iv_sram(drvdata);
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return 0;
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}
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@@ -329,9 +329,10 @@ int send_request(struct ssi_drvdata *drvdata, struct ssi_crypto_req *ssi_req,
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ssi_req->ivgen_size);
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/* Acquire IV from pool */
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rc = ssi_ivgen_getiv(drvdata, ssi_req->ivgen_dma_addr,
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ssi_req->ivgen_dma_addr_len,
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ssi_req->ivgen_size, iv_seq, &iv_seq_len);
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rc = cc_get_iv(drvdata, ssi_req->ivgen_dma_addr,
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ssi_req->ivgen_dma_addr_len,
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ssi_req->ivgen_size,
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iv_seq, &iv_seq_len);
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if (rc) {
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dev_err(dev, "Failed to generate IV (rc=%d)\n", rc);
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