Merge 4d1044fcb9 ("Merge tag 'riscv-for-linus-5.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux") into android-mainline

Steps on the way to 6.0-rc1

Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: I62792b9190da7e02f4679a7246b7ebc0c3805e9e
This commit is contained in:
Greg Kroah-Hartman
2022-08-23 07:58:10 +02:00
1995 changed files with 157294 additions and 25889 deletions

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@@ -22,6 +22,7 @@ Description:
MMUPageSize: 4 kB
Rss: 884 kB
Pss: 385 kB
Pss_Dirty: 68 kB
Pss_Anon: 301 kB
Pss_File: 80 kB
Pss_Shmem: 4 kB

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@@ -41,7 +41,7 @@ Description: Kernel Samepage Merging daemon sysfs interface
sleep_millisecs: how many milliseconds ksm should sleep between
scans.
See Documentation/vm/ksm.rst for more information.
See Documentation/mm/ksm.rst for more information.
What: /sys/kernel/mm/ksm/merge_across_nodes
Date: January 2013

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@@ -37,7 +37,7 @@ Description:
The alloc_calls file is read-only and lists the kernel code
locations from which allocations for this cache were performed.
The alloc_calls file only contains information if debugging is
enabled for that cache (see Documentation/vm/slub.rst).
enabled for that cache (see Documentation/mm/slub.rst).
What: /sys/kernel/slab/<cache>/alloc_fastpath
Date: February 2008
@@ -219,7 +219,7 @@ Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
Description:
The free_calls file is read-only and lists the locations of
object frees if slab debugging is enabled (see
Documentation/vm/slub.rst).
Documentation/mm/slub.rst).
What: /sys/kernel/slab/<cache>/free_fastpath
Date: February 2008

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@@ -1237,6 +1237,13 @@ PAGE_SIZE multiple when read back.
the target cgroup. If less bytes are reclaimed than the
specified amount, -EAGAIN is returned.
Please note that the proactive reclaim (triggered by this
interface) is not meant to indicate memory pressure on the
memory cgroup. Therefore socket memory balancing triggered by
the memory reclaim normally is not exercised in this case.
This means that the networking layer will not adapt based on
reclaim induced by memory.reclaim.
memory.peak
A read-only single value file which exists on non-root
cgroups.
@@ -1441,6 +1448,24 @@ PAGE_SIZE multiple when read back.
workingset_nodereclaim
Number of times a shadow node has been reclaimed
pgscan (npn)
Amount of scanned pages (in an inactive LRU list)
pgsteal (npn)
Amount of reclaimed pages
pgscan_kswapd (npn)
Amount of scanned pages by kswapd (in an inactive LRU list)
pgscan_direct (npn)
Amount of scanned pages directly (in an inactive LRU list)
pgsteal_kswapd (npn)
Amount of reclaimed pages by kswapd
pgsteal_direct (npn)
Amount of reclaimed pages directly
pgfault (npn)
Total number of page faults incurred
@@ -1450,12 +1475,6 @@ PAGE_SIZE multiple when read back.
pgrefill (npn)
Amount of scanned pages (in an active LRU list)
pgscan (npn)
Amount of scanned pages (in an inactive LRU list)
pgsteal (npn)
Amount of reclaimed pages
pgactivate (npn)
Amount of pages moved to the active LRU list

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@@ -1728,9 +1728,11 @@
Built with CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP_DEFAULT_ON=y,
the default is on.
This is not compatible with memory_hotplug.memmap_on_memory.
If both parameters are enabled, hugetlb_free_vmemmap takes
precedence over memory_hotplug.memmap_on_memory.
Note that the vmemmap pages may be allocated from the added
memory block itself when memory_hotplug.memmap_on_memory is
enabled, those vmemmap pages cannot be optimized even if this
feature is enabled. Other vmemmap pages not allocated from
the added memory block itself do not be affected.
hung_task_panic=
[KNL] Should the hung task detector generate panics.
@@ -2280,23 +2282,39 @@
ivrs_ioapic [HW,X86-64]
Provide an override to the IOAPIC-ID<->DEVICE-ID
mapping provided in the IVRS ACPI table. For
example, to map IOAPIC-ID decimal 10 to
PCI device 00:14.0 write the parameter as:
mapping provided in the IVRS ACPI table.
By default, PCI segment is 0, and can be omitted.
For example:
* To map IOAPIC-ID decimal 10 to PCI device 00:14.0
write the parameter as:
ivrs_ioapic[10]=00:14.0
* To map IOAPIC-ID decimal 10 to PCI segment 0x1 and
PCI device 00:14.0 write the parameter as:
ivrs_ioapic[10]=0001:00:14.0
ivrs_hpet [HW,X86-64]
Provide an override to the HPET-ID<->DEVICE-ID
mapping provided in the IVRS ACPI table. For
example, to map HPET-ID decimal 0 to
PCI device 00:14.0 write the parameter as:
mapping provided in the IVRS ACPI table.
By default, PCI segment is 0, and can be omitted.
For example:
* To map HPET-ID decimal 0 to PCI device 00:14.0
write the parameter as:
ivrs_hpet[0]=00:14.0
* To map HPET-ID decimal 10 to PCI segment 0x1 and
PCI device 00:14.0 write the parameter as:
ivrs_ioapic[10]=0001:00:14.0
ivrs_acpihid [HW,X86-64]
Provide an override to the ACPI-HID:UID<->DEVICE-ID
mapping provided in the IVRS ACPI table. For
example, to map UART-HID:UID AMD0020:0 to
PCI device 00:14.5 write the parameter as:
mapping provided in the IVRS ACPI table.
For example, to map UART-HID:UID AMD0020:0 to
PCI segment 0x1 and PCI device ID 00:14.5,
write the parameter as:
ivrs_acpihid[0001:00:14.5]=AMD0020:0
By default, PCI segment is 0, and can be omitted.
For example, PCI device 00:14.5 write the parameter as:
ivrs_acpihid[00:14.5]=AMD0020:0
js= [HW,JOY] Analog joystick
@@ -3081,10 +3099,12 @@
[KNL,X86,ARM] Boolean flag to enable this feature.
Format: {on | off (default)}
When enabled, runtime hotplugged memory will
allocate its internal metadata (struct pages)
from the hotadded memory which will allow to
hotadd a lot of memory without requiring
additional memory to do so.
allocate its internal metadata (struct pages,
those vmemmap pages cannot be optimized even
if hugetlb_free_vmemmap is enabled) from the
hotadded memory which will allow to hotadd a
lot of memory without requiring additional
memory to do so.
This feature is disabled by default because it
has some implication on large (e.g. GB)
allocations in some configurations (e.g. small
@@ -3094,10 +3114,6 @@
Note that even when enabled, there are a few cases where
the feature is not effective.
This is not compatible with hugetlb_free_vmemmap. If
both parameters are enabled, hugetlb_free_vmemmap takes
precedence over memory_hotplug.memmap_on_memory.
memtest= [KNL,X86,ARM,M68K,PPC,RISCV] Enable memtest
Format: <integer>
default : 0 <disable>
@@ -5510,7 +5526,7 @@
cache (risks via metadata attacks are mostly
unchanged). Debug options disable merging on their
own.
For more information see Documentation/vm/slub.rst.
For more information see Documentation/mm/slub.rst.
slab_max_order= [MM, SLAB]
Determines the maximum allowed order for slabs.
@@ -5524,13 +5540,13 @@
slub_debug can create guard zones around objects and
may poison objects when not in use. Also tracks the
last alloc / free. For more information see
Documentation/vm/slub.rst.
Documentation/mm/slub.rst.
slub_max_order= [MM, SLUB]
Determines the maximum allowed order for slabs.
A high setting may cause OOMs due to memory
fragmentation. For more information see
Documentation/vm/slub.rst.
Documentation/mm/slub.rst.
slub_min_objects= [MM, SLUB]
The minimum number of objects per slab. SLUB will
@@ -5539,12 +5555,12 @@
the number of objects indicated. The higher the number
of objects the smaller the overhead of tracking slabs
and the less frequently locks need to be acquired.
For more information see Documentation/vm/slub.rst.
For more information see Documentation/mm/slub.rst.
slub_min_order= [MM, SLUB]
Determines the minimum page order for slabs. Must be
lower than slub_max_order.
For more information see Documentation/vm/slub.rst.
For more information see Documentation/mm/slub.rst.
slub_merge [MM, SLUB]
Same with slab_merge.
@@ -5991,8 +6007,11 @@
it if 0 is given (See Documentation/admin-guide/cgroup-v1/memory.rst)
swiotlb= [ARM,IA-64,PPC,MIPS,X86]
Format: { <int> | force | noforce }
Format: { <int> [,<int>] | force | noforce }
<int> -- Number of I/O TLB slabs
<int> -- Second integer after comma. Number of swiotlb
areas with their own lock. Will be rounded up
to a power of 2.
force -- force using of bounce buffers even if they
wouldn't be automatically used by the kernel
noforce -- Never use bounce buffers (for debugging)

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@@ -125,7 +125,7 @@ processor. Each bank is referred to as a `node` and for each node Linux
constructs an independent memory management subsystem. A node has its
own set of zones, lists of free and used pages and various statistics
counters. You can find more details about NUMA in
:ref:`Documentation/vm/numa.rst <numa>` and in
:ref:`Documentation/mm/numa.rst <numa>` and in
:ref:`Documentation/admin-guide/mm/numa_memory_policy.rst <numa_memory_policy>`.
Page cache

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@@ -4,7 +4,7 @@
Monitoring Data Accesses
========================
:doc:`DAMON </vm/damon/index>` allows light-weight data access monitoring.
:doc:`DAMON </mm/damon/index>` allows light-weight data access monitoring.
Using DAMON, users can analyze the memory access patterns of their systems and
optimize those.
@@ -14,3 +14,4 @@ optimize those.
start
usage
reclaim
lru_sort

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@@ -0,0 +1,294 @@
.. SPDX-License-Identifier: GPL-2.0
=============================
DAMON-based LRU-lists Sorting
=============================
DAMON-based LRU-lists Sorting (DAMON_LRU_SORT) is a static kernel module that
aimed to be used for proactive and lightweight data access pattern based
(de)prioritization of pages on their LRU-lists for making LRU-lists a more
trusworthy data access pattern source.
Where Proactive LRU-lists Sorting is Required?
==============================================
As page-granularity access checking overhead could be significant on huge
systems, LRU lists are normally not proactively sorted but partially and
reactively sorted for special events including specific user requests, system
calls and memory pressure. As a result, LRU lists are sometimes not so
perfectly prepared to be used as a trustworthy access pattern source for some
situations including reclamation target pages selection under sudden memory
pressure.
Because DAMON can identify access patterns of best-effort accuracy while
inducing only user-specified range of overhead, proactively running
DAMON_LRU_SORT could be helpful for making LRU lists more trustworthy access
pattern source with low and controlled overhead.
How It Works?
=============
DAMON_LRU_SORT finds hot pages (pages of memory regions that showing access
rates that higher than a user-specified threshold) and cold pages (pages of
memory regions that showing no access for a time that longer than a
user-specified threshold) using DAMON, and prioritizes hot pages while
deprioritizing cold pages on their LRU-lists. To avoid it consuming too much
CPU for the prioritizations, a CPU time usage limit can be configured. Under
the limit, it prioritizes and deprioritizes more hot and cold pages first,
respectively. System administrators can also configure under what situation
this scheme should automatically activated and deactivated with three memory
pressure watermarks.
Its default parameters for hotness/coldness thresholds and CPU quota limit are
conservatively chosen. That is, the module under its default parameters could
be widely used without harm for common situations while providing a level of
benefits for systems having clear hot/cold access patterns under memory
pressure while consuming only a limited small portion of CPU time.
Interface: Module Parameters
============================
To use this feature, you should first ensure your system is running on a kernel
that is built with ``CONFIG_DAMON_LRU_SORT=y``.
To let sysadmins enable or disable it and tune for the given system,
DAMON_LRU_SORT utilizes module parameters. That is, you can put
``damon_lru_sort.<parameter>=<value>`` on the kernel boot command line or write
proper values to ``/sys/modules/damon_lru_sort/parameters/<parameter>`` files.
Below are the description of each parameter.
enabled
-------
Enable or disable DAMON_LRU_SORT.
You can enable DAMON_LRU_SORT by setting the value of this parameter as ``Y``.
Setting it as ``N`` disables DAMON_LRU_SORT. Note that DAMON_LRU_SORT could do
no real monitoring and LRU-lists sorting due to the watermarks-based activation
condition. Refer to below descriptions for the watermarks parameter for this.
commit_inputs
-------------
Make DAMON_LRU_SORT reads the input parameters again, except ``enabled``.
Input parameters that updated while DAMON_LRU_SORT is running are not applied
by default. Once this parameter is set as ``Y``, DAMON_LRU_SORT reads values
of parametrs except ``enabled`` again. Once the re-reading is done, this
parameter is set as ``N``. If invalid parameters are found while the
re-reading, DAMON_LRU_SORT will be disabled.
hot_thres_access_freq
---------------------
Access frequency threshold for hot memory regions identification in permil.
If a memory region is accessed in frequency of this or higher, DAMON_LRU_SORT
identifies the region as hot, and mark it as accessed on the LRU list, so that
it could not be reclaimed under memory pressure. 50% by default.
cold_min_age
------------
Time threshold for cold memory regions identification in microseconds.
If a memory region is not accessed for this or longer time, DAMON_LRU_SORT
identifies the region as cold, and mark it as unaccessed on the LRU list, so
that it could be reclaimed first under memory pressure. 120 seconds by
default.
quota_ms
--------
Limit of time for trying the LRU lists sorting in milliseconds.
DAMON_LRU_SORT tries to use only up to this time within a time window
(quota_reset_interval_ms) for trying LRU lists sorting. This can be used
for limiting CPU consumption of DAMON_LRU_SORT. If the value is zero, the
limit is disabled.
10 ms by default.
quota_reset_interval_ms
-----------------------
The time quota charge reset interval in milliseconds.
The charge reset interval for the quota of time (quota_ms). That is,
DAMON_LRU_SORT does not try LRU-lists sorting for more than quota_ms
milliseconds or quota_sz bytes within quota_reset_interval_ms milliseconds.
1 second by default.
wmarks_interval
---------------
The watermarks check time interval in microseconds.
Minimal time to wait before checking the watermarks, when DAMON_LRU_SORT is
enabled but inactive due to its watermarks rule. 5 seconds by default.
wmarks_high
-----------
Free memory rate (per thousand) for the high watermark.
If free memory of the system in bytes per thousand bytes is higher than this,
DAMON_LRU_SORT becomes inactive, so it does nothing but periodically checks the
watermarks. 200 (20%) by default.
wmarks_mid
----------
Free memory rate (per thousand) for the middle watermark.
If free memory of the system in bytes per thousand bytes is between this and
the low watermark, DAMON_LRU_SORT becomes active, so starts the monitoring and
the LRU-lists sorting. 150 (15%) by default.
wmarks_low
----------
Free memory rate (per thousand) for the low watermark.
If free memory of the system in bytes per thousand bytes is lower than this,
DAMON_LRU_SORT becomes inactive, so it does nothing but periodically checks the
watermarks. 50 (5%) by default.
sample_interval
---------------
Sampling interval for the monitoring in microseconds.
The sampling interval of DAMON for the cold memory monitoring. Please refer to
the DAMON documentation (:doc:`usage`) for more detail. 5ms by default.
aggr_interval
-------------
Aggregation interval for the monitoring in microseconds.
The aggregation interval of DAMON for the cold memory monitoring. Please
refer to the DAMON documentation (:doc:`usage`) for more detail. 100ms by
default.
min_nr_regions
--------------
Minimum number of monitoring regions.
The minimal number of monitoring regions of DAMON for the cold memory
monitoring. This can be used to set lower-bound of the monitoring quality.
But, setting this too high could result in increased monitoring overhead.
Please refer to the DAMON documentation (:doc:`usage`) for more detail. 10 by
default.
max_nr_regions
--------------
Maximum number of monitoring regions.
The maximum number of monitoring regions of DAMON for the cold memory
monitoring. This can be used to set upper-bound of the monitoring overhead.
However, setting this too low could result in bad monitoring quality. Please
refer to the DAMON documentation (:doc:`usage`) for more detail. 1000 by
defaults.
monitor_region_start
--------------------
Start of target memory region in physical address.
The start physical address of memory region that DAMON_LRU_SORT will do work
against. By default, biggest System RAM is used as the region.
monitor_region_end
------------------
End of target memory region in physical address.
The end physical address of memory region that DAMON_LRU_SORT will do work
against. By default, biggest System RAM is used as the region.
kdamond_pid
-----------
PID of the DAMON thread.
If DAMON_LRU_SORT is enabled, this becomes the PID of the worker thread. Else,
-1.
nr_lru_sort_tried_hot_regions
-----------------------------
Number of hot memory regions that tried to be LRU-sorted.
bytes_lru_sort_tried_hot_regions
--------------------------------
Total bytes of hot memory regions that tried to be LRU-sorted.
nr_lru_sorted_hot_regions
-------------------------
Number of hot memory regions that successfully be LRU-sorted.
bytes_lru_sorted_hot_regions
----------------------------
Total bytes of hot memory regions that successfully be LRU-sorted.
nr_hot_quota_exceeds
--------------------
Number of times that the time quota limit for hot regions have exceeded.
nr_lru_sort_tried_cold_regions
------------------------------
Number of cold memory regions that tried to be LRU-sorted.
bytes_lru_sort_tried_cold_regions
---------------------------------
Total bytes of cold memory regions that tried to be LRU-sorted.
nr_lru_sorted_cold_regions
--------------------------
Number of cold memory regions that successfully be LRU-sorted.
bytes_lru_sorted_cold_regions
-----------------------------
Total bytes of cold memory regions that successfully be LRU-sorted.
nr_cold_quota_exceeds
---------------------
Number of times that the time quota limit for cold regions have exceeded.
Example
=======
Below runtime example commands make DAMON_LRU_SORT to find memory regions
having >=50% access frequency and LRU-prioritize while LRU-deprioritizing
memory regions that not accessed for 120 seconds. The prioritization and
deprioritization is limited to be done using only up to 1% CPU time to avoid
DAMON_LRU_SORT consuming too much CPU time for the (de)prioritization. It also
asks DAMON_LRU_SORT to do nothing if the system's free memory rate is more than
50%, but start the real works if it becomes lower than 40%. If DAMON_RECLAIM
doesn't make progress and therefore the free memory rate becomes lower than
20%, it asks DAMON_LRU_SORT to do nothing again, so that we can fall back to
the LRU-list based page granularity reclamation. ::
# cd /sys/modules/damon_lru_sort/parameters
# echo 500 > hot_thres_access_freq
# echo 120000000 > cold_min_age
# echo 10 > quota_ms
# echo 1000 > quota_reset_interval_ms
# echo 500 > wmarks_high
# echo 400 > wmarks_mid
# echo 200 > wmarks_low
# echo Y > enabled

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@@ -48,12 +48,6 @@ DAMON_RECLAIM utilizes module parameters. That is, you can put
``damon_reclaim.<parameter>=<value>`` on the kernel boot command line or write
proper values to ``/sys/modules/damon_reclaim/parameters/<parameter>`` files.
Note that the parameter values except ``enabled`` are applied only when
DAMON_RECLAIM starts. Therefore, if you want to apply new parameter values in
runtime and DAMON_RECLAIM is already enabled, you should disable and re-enable
it via ``enabled`` parameter file. Writing of the new values to proper
parameter values should be done before the re-enablement.
Below are the description of each parameter.
enabled
@@ -268,4 +262,4 @@ granularity reclamation. ::
.. [1] https://research.google/pubs/pub48551/
.. [2] https://lwn.net/Articles/787611/
.. [3] https://www.kernel.org/doc/html/latest/vm/free_page_reporting.html
.. [3] https://www.kernel.org/doc/html/latest/mm/free_page_reporting.html

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@@ -30,11 +30,11 @@ DAMON provides below interfaces for different users.
<sysfs_interface>`. This will be removed after next LTS kernel is released,
so users should move to the :ref:`sysfs interface <sysfs_interface>`.
- *Kernel Space Programming Interface.*
:doc:`This </vm/damon/api>` is for kernel space programmers. Using this,
:doc:`This </mm/damon/api>` is for kernel space programmers. Using this,
users can utilize every feature of DAMON most flexibly and efficiently by
writing kernel space DAMON application programs for you. You can even extend
DAMON for various address spaces. For detail, please refer to the interface
:doc:`document </vm/damon/api>`.
:doc:`document </mm/damon/api>`.
.. _sysfs_interface:
@@ -185,7 +185,7 @@ controls the monitoring overhead, exist. You can set and get the values by
writing to and rading from the files.
For more details about the intervals and monitoring regions range, please refer
to the Design document (:doc:`/vm/damon/design`).
to the Design document (:doc:`/mm/damon/design`).
contexts/<N>/targets/
---------------------
@@ -264,6 +264,8 @@ that can be written to and read from the file and their meaning are as below.
- ``pageout``: Call ``madvise()`` for the region with ``MADV_PAGEOUT``
- ``hugepage``: Call ``madvise()`` for the region with ``MADV_HUGEPAGE``
- ``nohugepage``: Call ``madvise()`` for the region with ``MADV_NOHUGEPAGE``
- ``lru_prio``: Prioritize the region on its LRU lists.
- ``lru_deprio``: Deprioritize the region on its LRU lists.
- ``stat``: Do nothing but count the statistics
schemes/<N>/access_pattern/
@@ -402,7 +404,7 @@ Attributes
Users can get and set the ``sampling interval``, ``aggregation interval``,
``update interval``, and min/max number of monitoring target regions by
reading from and writing to the ``attrs`` file. To know about the monitoring
attributes in detail, please refer to the :doc:`/vm/damon/design`. For
attributes in detail, please refer to the :doc:`/mm/damon/design`. For
example, below commands set those values to 5 ms, 100 ms, 1,000 ms, 10 and
1000, and then check it again::

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@@ -36,6 +36,7 @@ the Linux memory management.
numa_memory_policy
numaperf
pagemap
shrinker_debugfs
soft-dirty
swap_numa
transhuge

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@@ -0,0 +1,135 @@
.. _shrinker_debugfs:
==========================
Shrinker Debugfs Interface
==========================
Shrinker debugfs interface provides a visibility into the kernel memory
shrinkers subsystem and allows to get information about individual shrinkers
and interact with them.
For each shrinker registered in the system a directory in **<debugfs>/shrinker/**
is created. The directory's name is composed from the shrinker's name and an
unique id: e.g. *kfree_rcu-0* or *sb-xfs:vda1-36*.
Each shrinker directory contains **count** and **scan** files, which allow to
trigger *count_objects()* and *scan_objects()* callbacks for each memcg and
numa node (if applicable).
Usage:
------
1. *List registered shrinkers*
::
$ cd /sys/kernel/debug/shrinker/
$ ls
dquota-cache-16 sb-devpts-28 sb-proc-47 sb-tmpfs-42
mm-shadow-18 sb-devtmpfs-5 sb-proc-48 sb-tmpfs-43
mm-zspool:zram0-34 sb-hugetlbfs-17 sb-pstore-31 sb-tmpfs-44
rcu-kfree-0 sb-hugetlbfs-33 sb-rootfs-2 sb-tmpfs-49
sb-aio-20 sb-iomem-12 sb-securityfs-6 sb-tracefs-13
sb-anon_inodefs-15 sb-mqueue-21 sb-selinuxfs-22 sb-xfs:vda1-36
sb-bdev-3 sb-nsfs-4 sb-sockfs-8 sb-zsmalloc-19
sb-bpf-32 sb-pipefs-14 sb-sysfs-26 thp-deferred_split-10
sb-btrfs:vda2-24 sb-proc-25 sb-tmpfs-1 thp-zero-9
sb-cgroup2-30 sb-proc-39 sb-tmpfs-27 xfs-buf:vda1-37
sb-configfs-23 sb-proc-41 sb-tmpfs-29 xfs-inodegc:vda1-38
sb-dax-11 sb-proc-45 sb-tmpfs-35
sb-debugfs-7 sb-proc-46 sb-tmpfs-40
2. *Get information about a specific shrinker*
::
$ cd sb-btrfs\:vda2-24/
$ ls
count scan
3. *Count objects*
Each line in the output has the following format::
<cgroup inode id> <nr of objects on node 0> <nr of objects on node 1> ...
<cgroup inode id> <nr of objects on node 0> <nr of objects on node 1> ...
...
If there are no objects on all numa nodes, a line is omitted. If there
are no objects at all, the output might be empty.
If the shrinker is not memcg-aware or CONFIG_MEMCG is off, 0 is printed
as cgroup inode id. If the shrinker is not numa-aware, 0's are printed
for all nodes except the first one.
::
$ cat count
1 224 2
21 98 0
55 818 10
2367 2 0
2401 30 0
225 13 0
599 35 0
939 124 0
1041 3 0
1075 1 0
1109 1 0
1279 60 0
1313 7 0
1347 39 0
1381 3 0
1449 14 0
1483 63 0
1517 53 0
1551 6 0
1585 1 0
1619 6 0
1653 40 0
1687 11 0
1721 8 0
1755 4 0
1789 52 0
1823 888 0
1857 1 0
1925 2 0
1959 32 0
2027 22 0
2061 9 0
2469 799 0
2537 861 0
2639 1 0
2707 70 0
2775 4 0
2877 84 0
293 1 0
735 8 0
4. *Scan objects*
The expected input format::
<cgroup inode id> <numa id> <number of objects to scan>
For a non-memcg-aware shrinker or on a system with no memory
cgrups **0** should be passed as cgroup id.
::
$ cd /sys/kernel/debug/shrinker/
$ cd sb-btrfs\:vda2-24/
$ cat count | head -n 5
1 212 0
21 97 0
55 802 5
2367 2 0
225 13 0
$ echo "55 0 200" > scan
$ cat count | head -n 5
1 212 0
21 96 0
55 752 5
2367 2 0
225 13 0

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@@ -565,9 +565,8 @@ See Documentation/admin-guide/mm/hugetlbpage.rst
hugetlb_optimize_vmemmap
========================
This knob is not available when memory_hotplug.memmap_on_memory (kernel parameter)
is configured or the size of 'struct page' (a structure defined in
include/linux/mm_types.h) is not power of two (an unusual system config could
This knob is not available when the size of 'struct page' (a structure defined
in include/linux/mm_types.h) is not power of two (an unusual system config could
result in this).
Enable (set to 1) or disable (set to 0) the feature of optimizing vmemmap pages
@@ -760,7 +759,7 @@ and don't use much of it.
The default value is 0.
See Documentation/vm/overcommit-accounting.rst and
See Documentation/mm/overcommit-accounting.rst and
mm/util.c::__vm_enough_memory() for more information.

View File

@@ -1,220 +0,0 @@
==========================================================
How to access I/O mapped memory from within device drivers
==========================================================
:Author: Linus
.. warning::
The virt_to_bus() and bus_to_virt() functions have been
superseded by the functionality provided by the PCI DMA interface
(see Documentation/core-api/dma-api-howto.rst). They continue
to be documented below for historical purposes, but new code
must not use them. --davidm 00/12/12
::
[ This is a mail message in response to a query on IO mapping, thus the
strange format for a "document" ]
The AHA-1542 is a bus-master device, and your patch makes the driver give the
controller the physical address of the buffers, which is correct on x86
(because all bus master devices see the physical memory mappings directly).
However, on many setups, there are actually **three** different ways of looking
at memory addresses, and in this case we actually want the third, the
so-called "bus address".
Essentially, the three ways of addressing memory are (this is "real memory",
that is, normal RAM--see later about other details):
- CPU untranslated. This is the "physical" address. Physical address
0 is what the CPU sees when it drives zeroes on the memory bus.
- CPU translated address. This is the "virtual" address, and is
completely internal to the CPU itself with the CPU doing the appropriate
translations into "CPU untranslated".
- bus address. This is the address of memory as seen by OTHER devices,
not the CPU. Now, in theory there could be many different bus
addresses, with each device seeing memory in some device-specific way, but
happily most hardware designers aren't actually actively trying to make
things any more complex than necessary, so you can assume that all
external hardware sees the memory the same way.
Now, on normal PCs the bus address is exactly the same as the physical
address, and things are very simple indeed. However, they are that simple
because the memory and the devices share the same address space, and that is
not generally necessarily true on other PCI/ISA setups.
Now, just as an example, on the PReP (PowerPC Reference Platform), the
CPU sees a memory map something like this (this is from memory)::
0-2 GB "real memory"
2 GB-3 GB "system IO" (inb/out and similar accesses on x86)
3 GB-4 GB "IO memory" (shared memory over the IO bus)
Now, that looks simple enough. However, when you look at the same thing from
the viewpoint of the devices, you have the reverse, and the physical memory
address 0 actually shows up as address 2 GB for any IO master.
So when the CPU wants any bus master to write to physical memory 0, it
has to give the master address 0x80000000 as the memory address.
So, for example, depending on how the kernel is actually mapped on the
PPC, you can end up with a setup like this::
physical address: 0
virtual address: 0xC0000000
bus address: 0x80000000
where all the addresses actually point to the same thing. It's just seen
through different translations..
Similarly, on the Alpha, the normal translation is::
physical address: 0
virtual address: 0xfffffc0000000000
bus address: 0x40000000
(but there are also Alphas where the physical address and the bus address
are the same).
Anyway, the way to look up all these translations, you do::
#include <asm/io.h>
phys_addr = virt_to_phys(virt_addr);
virt_addr = phys_to_virt(phys_addr);
bus_addr = virt_to_bus(virt_addr);
virt_addr = bus_to_virt(bus_addr);
Now, when do you need these?
You want the **virtual** address when you are actually going to access that
pointer from the kernel. So you can have something like this::
/*
* this is the hardware "mailbox" we use to communicate with
* the controller. The controller sees this directly.
*/
struct mailbox {
__u32 status;
__u32 bufstart;
__u32 buflen;
..
} mbox;
unsigned char * retbuffer;
/* get the address from the controller */
retbuffer = bus_to_virt(mbox.bufstart);
switch (retbuffer[0]) {
case STATUS_OK:
...
on the other hand, you want the bus address when you have a buffer that
you want to give to the controller::
/* ask the controller to read the sense status into "sense_buffer" */
mbox.bufstart = virt_to_bus(&sense_buffer);
mbox.buflen = sizeof(sense_buffer);
mbox.status = 0;
notify_controller(&mbox);
And you generally **never** want to use the physical address, because you can't
use that from the CPU (the CPU only uses translated virtual addresses), and
you can't use it from the bus master.
So why do we care about the physical address at all? We do need the physical
address in some cases, it's just not very often in normal code. The physical
address is needed if you use memory mappings, for example, because the
"remap_pfn_range()" mm function wants the physical address of the memory to
be remapped as measured in units of pages, a.k.a. the pfn (the memory
management layer doesn't know about devices outside the CPU, so it
shouldn't need to know about "bus addresses" etc).
.. note::
The above is only one part of the whole equation. The above
only talks about "real memory", that is, CPU memory (RAM).
There is a completely different type of memory too, and that's the "shared
memory" on the PCI or ISA bus. That's generally not RAM (although in the case
of a video graphics card it can be normal DRAM that is just used for a frame
buffer), but can be things like a packet buffer in a network card etc.
This memory is called "PCI memory" or "shared memory" or "IO memory" or
whatever, and there is only one way to access it: the readb/writeb and
related functions. You should never take the address of such memory, because
there is really nothing you can do with such an address: it's not
conceptually in the same memory space as "real memory" at all, so you cannot
just dereference a pointer. (Sadly, on x86 it **is** in the same memory space,
so on x86 it actually works to just deference a pointer, but it's not
portable).
For such memory, you can do things like:
- reading::
/*
* read first 32 bits from ISA memory at 0xC0000, aka
* C000:0000 in DOS terms
*/
unsigned int signature = isa_readl(0xC0000);
- remapping and writing::
/*
* remap framebuffer PCI memory area at 0xFC000000,
* size 1MB, so that we can access it: We can directly
* access only the 640k-1MB area, so anything else
* has to be remapped.
*/
void __iomem *baseptr = ioremap(0xFC000000, 1024*1024);
/* write a 'A' to the offset 10 of the area */
writeb('A',baseptr+10);
/* unmap when we unload the driver */
iounmap(baseptr);
- copying and clearing::
/* get the 6-byte Ethernet address at ISA address E000:0040 */
memcpy_fromio(kernel_buffer, 0xE0040, 6);
/* write a packet to the driver */
memcpy_toio(0xE1000, skb->data, skb->len);
/* clear the frame buffer */
memset_io(0xA0000, 0, 0x10000);
OK, that just about covers the basics of accessing IO portably. Questions?
Comments? You may think that all the above is overly complex, but one day you
might find yourself with a 500 MHz Alpha in front of you, and then you'll be
happy that your driver works ;)
Note that kernel versions 2.0.x (and earlier) mistakenly called the
ioremap() function "vremap()". ioremap() is the proper name, but I
didn't think straight when I wrote it originally. People who have to
support both can do something like::
/* support old naming silliness */
#if LINUX_VERSION_CODE < 0x020100
#define ioremap vremap
#define iounmap vfree
#endif
at the top of their source files, and then they can use the right names
even on 2.0.x systems.
And the above sounds worse than it really is. Most real drivers really
don't do all that complex things (or rather: the complexity is not so
much in the actual IO accesses as in error handling and timeouts etc).
It's generally not hard to fix drivers, and in many cases the code
actually looks better afterwards::
unsigned long signature = *(unsigned int *) 0xC0000;
vs
unsigned long signature = readl(0xC0000);
I think the second version actually is more readable, no?

View File

@@ -707,20 +707,6 @@ to use the dma_sync_*() interfaces::
}
}
Drivers converted fully to this interface should not use virt_to_bus() any
longer, nor should they use bus_to_virt(). Some drivers have to be changed a
little bit, because there is no longer an equivalent to bus_to_virt() in the
dynamic DMA mapping scheme - you have to always store the DMA addresses
returned by the dma_alloc_coherent(), dma_pool_alloc(), and dma_map_single()
calls (dma_map_sg() stores them in the scatterlist itself if the platform
supports dynamic DMA mapping in hardware) in your driver structures and/or
in the card registers.
All drivers should be using these interfaces with no exceptions. It
is planned to completely remove virt_to_bus() and bus_to_virt() as
they are entirely deprecated. Some ports already do not provide these
as it is impossible to correctly support them.
Handling Errors
===============

View File

@@ -204,6 +204,20 @@ Returns the maximum size of a mapping for the device. The size parameter
of the mapping functions like dma_map_single(), dma_map_page() and
others should not be larger than the returned value.
::
size_t
dma_opt_mapping_size(struct device *dev);
Returns the maximum optimal size of a mapping for the device.
Mapping larger buffers may take much longer in certain scenarios. In
addition, for high-rate short-lived streaming mappings, the upfront time
spent on the mapping may account for an appreciable part of the total
request lifetime. As such, if splitting larger requests incurs no
significant performance penalty, then device drivers are advised to
limit total DMA streaming mappings length to the returned value.
::
bool

View File

@@ -41,7 +41,6 @@ Library functionality that is used throughout the kernel.
rbtree
generic-radix-tree
packing
bus-virt-phys-mapping
this_cpu_ops
timekeeping
errseq
@@ -87,7 +86,7 @@ Memory management
=================
How to allocate and use memory in the kernel. Note that there is a lot
more memory-management documentation in Documentation/vm/index.rst.
more memory-management documentation in Documentation/mm/index.rst.
.. toctree::
:maxdepth: 1

View File

@@ -174,7 +174,6 @@ mapping:
- ``kmemleak_alloc_phys``
- ``kmemleak_free_part_phys``
- ``kmemleak_not_leak_phys``
- ``kmemleak_ignore_phys``
Dealing with false positives/negatives

View File

@@ -0,0 +1,91 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/dsp/mediatek,mt8186-dsp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek mt8186 DSP core
maintainers:
- Tinghan Shen <tinghan.shen@mediatek.com>
description: |
MediaTek mt8186 SoC contains a DSP core used for
advanced pre- and post- audio processing.
properties:
compatible:
const: mediatek,mt8186-dsp
reg:
items:
- description: Address and size of the DSP config registers
- description: Address and size of the DSP SRAM
- description: Address and size of the DSP secure registers
- description: Address and size of the DSP bus registers
reg-names:
items:
- const: cfg
- const: sram
- const: sec
- const: bus
clocks:
items:
- description: mux for audio dsp clock
- description: mux for audio dsp local bus
clock-names:
items:
- const: audiodsp
- const: adsp_bus
power-domains:
maxItems: 1
mboxes:
items:
- description: mailbox for receiving audio DSP requests.
- description: mailbox for transmitting requests to audio DSP.
mbox-names:
items:
- const: rx
- const: tx
memory-region:
items:
- description: dma buffer between host and DSP.
- description: DSP system memory.
required:
- compatible
- reg
- reg-names
- clocks
- clock-names
- power-domains
- mbox-names
- mboxes
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/mt8186-clk.h>
dsp@10680000 {
compatible = "mediatek,mt8186-dsp";
reg = <0x10680000 0x2000>,
<0x10800000 0x100000>,
<0x1068b000 0x100>,
<0x1068f000 0x1000>;
reg-names = "cfg", "sram", "sec", "bus";
clocks = <&topckgen CLK_TOP_AUDIODSP>,
<&topckgen CLK_TOP_ADSP_BUS>;
clock-names = "audiodsp",
"adsp_bus";
power-domains = <&spm 6>;
mbox-names = "rx", "tx";
mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
};

View File

@@ -50,13 +50,13 @@ properties:
mboxes:
items:
- description: ipc reply between host and audio DSP.
- description: ipc request between host and audio DSP.
- description: mailbox for receiving audio DSP requests.
- description: mailbox for transmitting requests to audio DSP.
mbox-names:
items:
- const: mbox0
- const: mbox1
- const: rx
- const: tx
memory-region:
items:
@@ -100,6 +100,6 @@ examples:
memory-region = <&adsp_dma_mem_reserved>,
<&adsp_mem_reserved>;
power-domains = <&spm 6>; //MT8195_POWER_DOMAIN_ADSP
mbox-names = "mbox0", "mbox1";
mbox-names = "rx", "tx";
mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
};

View File

@@ -42,6 +42,7 @@ properties:
- qcom,sdx55-smmu-500
- qcom,sdx65-smmu-500
- qcom,sm6350-smmu-500
- qcom,sm6375-smmu-500
- qcom,sm8150-smmu-500
- qcom,sm8250-smmu-500
- qcom,sm8350-smmu-500

View File

@@ -101,6 +101,10 @@ properties:
items:
- const: bclk
mediatek,infracfg:
$ref: /schemas/types.yaml#/definitions/phandle
description: The phandle to the mediatek infracfg syscon
mediatek,larbs:
$ref: /schemas/types.yaml#/definitions/phandle-array
minItems: 1
@@ -167,6 +171,18 @@ allOf:
required:
- power-domains
- if:
properties:
compatible:
contains:
enum:
- mediatek,mt2712-m4u
- mediatek,mt8173-m4u
then:
required:
- mediatek,infracfg
- if: # The IOMMUs don't have larbs.
not:
properties:
@@ -191,6 +207,7 @@ examples:
interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_LOW>;
clocks = <&infracfg CLK_INFRA_M4U>;
clock-names = "bclk";
mediatek,infracfg = <&infracfg>;
mediatek,larbs = <&larb0>, <&larb1>, <&larb2>,
<&larb3>, <&larb4>, <&larb5>;
#iommu-cells = <1>;

View File

@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Common backlight properties
maintainers:
- Lee Jones <lee.jones@linaro.org>
- Lee Jones <lee@kernel.org>
- Daniel Thompson <daniel.thompson@linaro.org>
- Jingoo Han <jingoohan1@gmail.com>

View File

@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: gpio-backlight bindings
maintainers:
- Lee Jones <lee.jones@linaro.org>
- Lee Jones <lee@kernel.org>
- Daniel Thompson <daniel.thompson@linaro.org>
- Jingoo Han <jingoohan1@gmail.com>

View File

@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: led-backlight bindings
maintainers:
- Lee Jones <lee.jones@linaro.org>
- Lee Jones <lee@kernel.org>
- Daniel Thompson <daniel.thompson@linaro.org>
- Jingoo Han <jingoohan1@gmail.com>

View File

@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI LM3630A High-Efficiency Dual-String White LED
maintainers:
- Lee Jones <lee.jones@linaro.org>
- Lee Jones <lee@kernel.org>
- Daniel Thompson <daniel.thompson@linaro.org>
- Jingoo Han <jingoohan1@gmail.com>

View File

@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: pwm-backlight bindings
maintainers:
- Lee Jones <lee.jones@linaro.org>
- Lee Jones <lee@kernel.org>
- Daniel Thompson <daniel.thompson@linaro.org>
- Jingoo Han <jingoohan1@gmail.com>

View File

@@ -47,6 +47,11 @@ properties:
minimum: 0
maximum: 3
richtek,bled-ocp-microamp:
description: |
Backlight over current protection level.
enum: [900000, 1200000, 1500000, 1800000]
richtek,channel-use:
description: |
Backlight LED channel to be used.

View File

@@ -1,114 +0,0 @@
* Dialog DA9063/DA9063L Power Management Integrated Circuit (PMIC)
DA9063 consists of a large and varied group of sub-devices (I2C Only):
Device Supply Names Description
------ ------------ -----------
da9063-regulator : : LDOs & BUCKs
da9063-onkey : : On Key
da9063-rtc : : Real-Time Clock (DA9063 only)
da9063-watchdog : : Watchdog
======
Required properties:
- compatible : Should be "dlg,da9063" or "dlg,da9063l"
- reg : Specifies the I2C slave address (this defaults to 0x58 but it can be
modified to match the chip's OTP settings).
- interrupts : IRQ line information.
- interrupt-controller
Sub-nodes:
- regulators : This node defines the settings for the LDOs and BUCKs.
The DA9063(L) regulators are bound using their names listed below:
bcore1 : BUCK CORE1
bcore2 : BUCK CORE2
bpro : BUCK PRO
bmem : BUCK MEM
bio : BUCK IO
bperi : BUCK PERI
ldo1 : LDO_1 (DA9063 only)
ldo2 : LDO_2 (DA9063 only)
ldo3 : LDO_3
ldo4 : LDO_4 (DA9063 only)
ldo5 : LDO_5 (DA9063 only)
ldo6 : LDO_6 (DA9063 only)
ldo7 : LDO_7
ldo8 : LDO_8
ldo9 : LDO_9
ldo10 : LDO_10 (DA9063 only)
ldo11 : LDO_11
The component follows the standard regulator framework and the bindings
details of individual regulator device can be found in:
Documentation/devicetree/bindings/regulator/regulator.txt
- rtc : This node defines settings for the Real-Time Clock associated with
the DA9063 only. The RTC is not present in DA9063L. There are currently
no entries in this binding, however compatible = "dlg,da9063-rtc" should
be added if a node is created.
- onkey : This node defines the OnKey settings for controlling the key
functionality of the device. The node should contain the compatible property
with the value "dlg,da9063-onkey".
Optional onkey properties:
- dlg,disable-key-power : Disable power-down using a long key-press. If this
entry exists the OnKey driver will remove support for the KEY_POWER key
press. If this entry does not exist then by default the key-press
triggered power down is enabled and the OnKey will support both KEY_POWER
and KEY_SLEEP.
- watchdog : This node defines settings for the Watchdog timer associated
with the DA9063 and DA9063L. The node should contain the compatible property
with the value "dlg,da9063-watchdog".
Optional watchdog properties:
- dlg,use-sw-pm: Add this property to disable the watchdog during suspend.
Only use this option if you can't use the watchdog automatic suspend
function during a suspend (see register CONTROL_B).
Example:
pmic0: da9063@58 {
compatible = "dlg,da9063"
reg = <0x58>;
interrupt-parent = <&gpio6>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
rtc {
compatible = "dlg,da9063-rtc";
};
wdt {
compatible = "dlg,da9063-watchdog";
};
onkey {
compatible = "dlg,da9063-onkey";
dlg,disable-key-power;
};
regulators {
DA9063_BCORE1: bcore1 {
regulator-name = "BCORE1";
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1570000>;
regulator-min-microamp = <500000>;
regulator-max-microamp = <2000000>;
regulator-boot-on;
};
DA9063_LDO11: ldo11 {
regulator-name = "LDO_11";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3600000>;
regulator-boot-on;
};
};
};

View File

@@ -0,0 +1,132 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/dlg,da9063.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Dialog DA9063/DA9063L Power Management Integrated Circuit (PMIC)
maintainers:
- Steve Twiss <stwiss.opensource@diasemi.com>
description: |
For device-tree bindings of other sub-modules refer to the binding documents
under the respective sub-system directories.
properties:
compatible:
enum:
- dlg,da9063
- dlg,da9063l
reg:
maxItems: 1
interrupts:
maxItems: 1
interrupt-controller: true
"#interrupt-cells":
const: 2
dlg,use-sw-pm:
type: boolean
description:
Disable the watchdog during suspend.
Only use this option if you can't use the watchdog automatic suspend
function during a suspend (see register CONTROL_B).
watchdog:
type: object
$ref: /schemas/watchdog/watchdog.yaml#
unevaluatedProperties: false
properties:
compatible:
const: dlg,da9063-watchdog
rtc:
type: object
$ref: /schemas/rtc/rtc.yaml#
unevaluatedProperties: false
properties:
compatible:
const: dlg,da9063-rtc
onkey:
type: object
$ref: /schemas/input/input.yaml#
unevaluatedProperties: false
properties:
compatible:
const: dlg,da9063-onkey
dlg,disable-key-power:
type: boolean
description: |
Disable power-down using a long key-press.
If this entry does not exist then by default the key-press triggered
power down is enabled and the OnKey will support both KEY_POWER and
KEY_SLEEP.
regulators:
type: object
patternProperties:
"^(ldo[1-11]|bcore[1-2]|bpro|bmem|bio|bperi)$":
$ref: /schemas/regulator/regulator.yaml
unevaluatedProperties: false
required:
- compatible
- reg
- interrupts
- interrupt-controller
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
pmic@58 {
compatible = "dlg,da9063";
reg = <0x58>;
#interrupt-cells = <2>;
interrupt-parent = <&gpio6>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
rtc {
compatible = "dlg,da9063-rtc";
};
watchdog {
compatible = "dlg,da9063-watchdog";
};
onkey {
compatible = "dlg,da9063-onkey";
dlg,disable-key-power;
};
regulators {
regulator-bcore1 {
regulator-name = "BCORE1";
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1570000>;
regulator-min-microamp = <500000>;
regulator-max-microamp = <2000000>;
regulator-boot-on;
};
regulator-ldo11 {
regulator-name = "LDO_11";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3600000>;
regulator-boot-on;
};
};
};
};
...

View File

@@ -18,7 +18,9 @@ description: |
properties:
compatible:
const: mps,mp2629
enum:
- mps,mp2629
- mps,mp2733
reg:
maxItems: 1

View File

@@ -20,6 +20,7 @@ This document describes the binding for MFD device and its sub module.
Required properties:
compatible:
"mediatek,mt6323" for PMIC MT6323
"mediatek,mt6331" for PMIC MT6331 and MT6332
"mediatek,mt6358" for PMIC MT6358 and MT6366
"mediatek,mt6359" for PMIC MT6359
"mediatek,mt6397" for PMIC MT6397
@@ -29,6 +30,7 @@ Optional subnodes:
- rtc
Required properties: Should be one of follows
- compatible: "mediatek,mt6323-rtc"
- compatible: "mediatek,mt6331-rtc"
- compatible: "mediatek,mt6358-rtc"
- compatible: "mediatek,mt6397-rtc"
For details, see ../rtc/rtc-mt6397.txt
@@ -52,8 +54,10 @@ Optional subnodes:
see ../leds/leds-mt6323.txt
- keys
Required properties:
- compatible: "mediatek,mt6397-keys" or "mediatek,mt6323-keys"
Required properties: Should be one of the following
- compatible: "mediatek,mt6323-keys"
- compatible: "mediatek,mt6331-keys"
- compatible: "mediatek,mt6397-keys"
see ../input/mtk-pmic-keys.txt
- power-controller

View File

@@ -1,24 +0,0 @@
QCOM Top Control and Status Register
Qualcomm devices have a set of registers that provide various control and status
functions for their peripherals. This node is intended to allow access to these
registers via syscon.
Required properties:
- compatible: Should contain:
"qcom,tcsr-ipq6018", "syscon", "simple-mfd" for IPQ6018
"qcom,tcsr-ipq8064", "syscon" for IPQ8064
"qcom,tcsr-apq8064", "syscon" for APQ8064
"qcom,tcsr-msm8660", "syscon" for MSM8660
"qcom,tcsr-msm8953", "syscon" for MSM8953
"qcom,tcsr-msm8960", "syscon" for MSM8960
"qcom,tcsr-msm8974", "syscon" for MSM8974
"qcom,tcsr-apq8084", "syscon" for APQ8084
"qcom,tcsr-msm8916", "syscon" for MSM8916
- reg: Address range for TCSR registers
Example:
tcsr: syscon@1a400000 {
compatible = "qcom,tcsr-msm8960", "syscon";
reg = <0x1a400000 0x100>;
};

View File

@@ -0,0 +1,50 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/qcom,tcsr.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Top Control and Status Register
maintainers:
- Bjorn Andersson <bjorn.andersson@linaro.org>
description:
Qualcomm devices have a set of registers that provide various control and
status functions for their peripherals.
properties:
compatible:
oneOf:
- items:
- enum:
- qcom,tcsr-apq8064
- qcom,tcsr-apq8084
- qcom,tcsr-ipq8064
- qcom,tcsr-mdm9615
- qcom,tcsr-msm8660
- qcom,tcsr-msm8916
- qcom,tcsr-msm8953
- qcom,tcsr-msm8960
- qcom,tcsr-msm8974
- const: syscon
- items:
- const: qcom,tcsr-ipq6018
- const: syscon
- const: simple-mfd
reg:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
syscon@1a400000 {
compatible = "qcom,tcsr-msm8960", "syscon";
reg = <0x1a400000 0x100>;
};

View File

@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm PM8xxx PMIC multi-function devices
maintainers:
- Satya Priya <skakit@codeaurora.org>
- Satya Priya <quic_c_skakit@quicinc.com>
description: |
The PM8xxx family of Power Management ICs are used to provide regulated

View File

@@ -58,24 +58,6 @@ properties:
- "#pwm-cells"
- compatible
patternProperties:
"^trigger@[0-9]+$":
type: object
properties:
compatible:
const: st,stm32-lptimer-trigger
reg:
description: Identify trigger hardware block.
items:
minimum: 0
maximum: 2
required:
- compatible
- reg
counter:
type: object
@@ -96,6 +78,24 @@ patternProperties:
required:
- compatible
patternProperties:
"^trigger@[0-9]+$":
type: object
properties:
compatible:
const: st,stm32-lptimer-trigger
reg:
description: Identify trigger hardware block.
items:
minimum: 0
maximum: 2
required:
- compatible
- reg
required:
- "#address-cells"
- "#size-cells"

View File

@@ -33,7 +33,7 @@ properties:
items:
- const: int
reset:
resets:
maxItems: 1
dmas:
@@ -46,6 +46,21 @@ properties:
minItems: 1
maxItems: 7
interrupts:
oneOf:
- maxItems: 1
- maxItems: 4
interrupt-names:
oneOf:
- items:
- const: global
- items:
- const: brk
- const: up
- const: trg-com
- const: cc
"#address-cells":
const: 1
@@ -87,6 +102,16 @@ properties:
- "#pwm-cells"
- compatible
counter:
type: object
properties:
compatible:
const: st,stm32-timer-counter
required:
- compatible
patternProperties:
"^timer@[0-9]+$":
type: object
@@ -107,16 +132,6 @@ patternProperties:
- compatible
- reg
counter:
type: object
properties:
compatible:
const: st,stm32-timer-counter
required:
- compatible
required:
- compatible
- reg

View File

@@ -17,7 +17,7 @@ description: |
and access the registers directly.
maintainers:
- Lee Jones <lee.jones@linaro.org>
- Lee Jones <lee@kernel.org>
select:
properties:

View File

@@ -48,6 +48,12 @@ patternProperties:
description:
This is the SERDES lane control mux.
"^clock-controller@[0-9a-f]+$":
type: object
$ref: /schemas/clock/ti,am654-ehrpwm-tbclk.yaml#
description:
Clock provider for TI EHRPWM nodes.
required:
- compatible
- reg
@@ -79,5 +85,11 @@ examples:
<0x40c0 0x3>, <0x40c4 0x3>, <0x40c8 0x3>, <0x40cc 0x3>;
/* SERDES4 lane0/1/2/3 select */
};
clock-controller@4140 {
compatible = "ti,am654-ehrpwm-tbclk", "syscon";
reg = <0x4140 0x18>;
#clock-cells = <1>;
};
};
...

View File

@@ -37,6 +37,4 @@ examples:
compatible = "fsl,imx27-nand";
reg = <0xd8000000 0x1000>;
interrupts = <29>;
nand-bus-width = <8>;
nand-ecc-mode = "hw";
};

View File

@@ -11,6 +11,17 @@ description: |
relative offset and size specified. Depending on partition function extra
properties can be used.
A partition may be dynamically allocated by a specific parser at runtime.
In this specific case, a specific suffix is required to the node name.
Everything after 'partition-' will be used as the partition name to compare
with the one dynamically allocated by the specific parser.
If the partition contains invalid char a label can be provided that will
be used instead of the node name to make the comparison.
This is used to assign an OF node to the dynamiccally allocated partition
so that subsystem like NVMEM can provide an OF node and declare NVMEM cells.
The OF node will be assigned only if the partition label declared match the
one assigned by the parser at runtime.
maintainers:
- Rafał Miłecki <rafal@milecki.pl>
@@ -41,7 +52,12 @@ properties:
immune to paired-pages corruptions
type: boolean
required:
- reg
if:
not:
required: [ reg ]
then:
properties:
$nodename:
pattern: '^partition-.*$'
additionalProperties: true

View File

@@ -19,6 +19,10 @@ properties:
compatible:
const: qcom,smem-part
patternProperties:
"^partition-[0-9a-z]+$":
$ref: partition.yaml#
required:
- compatible
@@ -31,3 +35,26 @@ examples:
compatible = "qcom,smem-part";
};
};
- |
/* Example declaring dynamic partition */
flash {
partitions {
compatible = "qcom,smem-part";
partition-art {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
label = "0:art";
macaddr_art_0: macaddr@0 {
reg = <0x0 0x6>;
};
macaddr_art_6: macaddr@6 {
reg = <0x6 0x6>;
};
};
};
};

View File

@@ -102,6 +102,31 @@ allOf:
- const: rx
- const: cmd
- if:
properties:
compatible:
contains:
enum:
- qcom,ipq806x-nand
then:
properties:
qcom,boot-partitions:
$ref: /schemas/types.yaml#/definitions/uint32-matrix
items:
items:
- description: offset
- description: size
description:
Boot partition use a different layout where the 4 bytes of spare
data are not protected by ECC. Use this to declare these special
partitions by defining first the offset and then the size.
It's in the form of <offset1 size1 offset2 size2 offset3 ...>
and should be declared in ascending order.
Refer to the ipq8064 example on how to use this special binding.
required:
- compatible
- reg
@@ -135,6 +160,8 @@ examples:
nand-ecc-strength = <4>;
nand-bus-width = <8>;
qcom,boot-partitions = <0x0 0x58a0000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;

View File

@@ -17,6 +17,7 @@ properties:
compatible:
items:
- enum:
- renesas,r9a07g043-usbphy-ctrl # RZ/G2UL
- renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC}
- renesas,r9a07g054-usbphy-ctrl # RZ/V2L
- const: renesas,rzg2l-usbphy-ctrl

View File

@@ -0,0 +1,49 @@
# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/reset/ti,tps380x-reset.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI TPS380x reset controller node bindings
maintainers:
- Marco Felsch <kernel@pengutronix.de>
description: |
The TPS380x family [1] of supervisory circuits monitor supply voltages to
provide circuit initialization and timing supervision. The devices assert a
RESET signal if the voltage drops below a preset threshold or upon a manual
reset input (MR). The RESET output remains asserted for the factory
programmed delay after the voltage return above its threshold or after the
manual reset input is released.
[1] https://www.ti.com/product/TPS3801
properties:
compatible:
enum:
- ti,tps3801
reset-gpios:
maxItems: 1
description: Reference to the GPIO connected to the MR pin.
"#reset-cells":
const: 0
required:
- compatible
- reset-gpios
- "#reset-cells"
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
reset: reset-controller {
compatible = "ti,tps3801";
#reset-cells = <0>;
reset-gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
};
...

View File

@@ -32,8 +32,6 @@ properties:
reset-gpios:
maxItems: 1
spi-max-frequency: true
AVDD-supply:
description: Analog power support for the device.
@@ -52,7 +50,10 @@ required:
- compatible
- AVDD-supply
additionalProperties: false
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |

View File

@@ -24,6 +24,21 @@ properties:
maxItems: 1
description: I2C address of the device.
avdd-supply:
description: A 1.8V supply that powers up the AVDD pin.
dvdd-supply:
description: A 1.2V supply that powers up the DVDD pin.
dvddio-supply:
description: A 1.2V or 1.8V supply that powers up the VDDIO pin.
pvdd-supply:
description: A 3.0V to 20V supply that powers up the PVDD pin.
vbat-supply:
description: A 3.3V to 5.5V supply that powers up the VBAT pin.
adi,vmon-slot-no:
description: slot number of the voltage sense monitor
$ref: "/schemas/types.yaml#/definitions/uint32"
@@ -36,13 +51,22 @@ properties:
$ref: "/schemas/types.yaml#/definitions/uint32"
minimum: 0
maximum: 15
default: 0
default: 1
adi,spkfb-slot-no:
description: slot number of speaker DSP monitor
$ref: "/schemas/types.yaml#/definitions/uint32"
minimum: 0
maximum: 15
default: 2
adi,bypass-slot-no:
description:
Selects the PCM data input channel that is routed to the speaker
audio processing bypass path.
$ref: "/schemas/types.yaml#/definitions/uint32"
minimum: 0
maximum: 15
default: 0
adi,interleave-mode:
@@ -72,6 +96,10 @@ examples:
max98396: amplifier@39 {
compatible = "adi,max98396";
reg = <0x39>;
dvdd-supply = <&regulator_1v2>;
dvddio-supply = <&regulator_1v8>;
avdd-supply = <&regulator_1v8>;
pvdd-supply = <&regulator_pvdd>;
adi,vmon-slot-no = <0>;
adi,imon-slot-no = <1>;
reset-gpios = <&gpio 4 GPIO_ACTIVE_LOW>;

View File

@@ -21,6 +21,11 @@ properties:
description:
Regulator for the headphone amplifier
allwinner,internal-bias-resistor:
description:
Enable the internal 2.2K bias resistor between HBIAS and MICDET pins
type: boolean
required:
- compatible
- reg

View File

@@ -0,0 +1,100 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/atmel,sama5d2-classd.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atmel ClassD Amplifier
maintainers:
- Nicolas Ferre <nicolas.ferre@microchip.com>
- Alexandre Belloni <alexandre.belloni@bootlin.com>
- Claudiu Beznea <claudiu.beznea@microchip.com>
description:
The Audio Class D Amplifier (CLASSD) is a digital input, Pulse Width
Modulated (PWM) output stereo Class D amplifier.
properties:
compatible:
const: atmel,sama5d2-classd
reg:
maxItems: 1
interrupts:
maxItems: 1
dmas:
maxItems: 1
dma-names:
const: tx
clocks:
maxItems: 2
clock-names:
items:
- const: pclk
- const: gclk
atmel,model:
$ref: /schemas/types.yaml#/definitions/string
default: CLASSD
description: The user-visible name of this sound complex.
atmel,pwm-type:
$ref: /schemas/types.yaml#/definitions/string
enum:
- single
- diff
default: single
description: PWM modulation type.
atmel,non-overlap-time:
$ref: /schemas/types.yaml#/definitions/uint32
enum:
- 5
- 10
- 15
- 20
default: 10
description:
Set non-overlapping time, the unit is nanosecond(ns).
Non-overlapping will be disabled if not specified.
required:
- compatible
- reg
- interrupts
- dmas
- dma-names
- clock-names
- clocks
additionalProperties: false
examples:
- |
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
classd: sound@fc048000 {
compatible = "atmel,sama5d2-classd";
reg = <0xfc048000 0x100>;
interrupts = <59 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(47))>;
dma-names = "tx";
clocks = <&classd_clk>, <&classd_gclk>;
clock-names = "pclk", "gclk";
assigned-clocks = <&classd_gclk>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_classd_default>;
atmel,model = "classd @ SAMA5D2-Xplained";
atmel,pwm-type = "diff";
atmel,non-overlap-time = <10>;
};

View File

@@ -0,0 +1,85 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/atmel,sama5d2-i2s.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atmel I2S controller
maintainers:
- Nicolas Ferre <nicolas.ferre@microchip.com>
- Alexandre Belloni <alexandre.belloni@bootlin.com>
- Claudiu Beznea <claudiu.beznea@microchip.com>
description:
Atmel I2S (Inter-IC Sound Controller) bus is the standard
interface for connecting audio devices, such as audio codecs.
properties:
compatible:
const: atmel,sama5d2-i2s
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: Peripheral clock
- description: Generated clock (Optional)
- description: I2S mux clock (Optional). Set
with gclk when Master Mode is required.
minItems: 1
clock-names:
items:
- const: pclk
- const: gclk
- const: muxclk
minItems: 1
dmas:
items:
- description: TX DMA Channel
- description: RX DMA Channel
dma-names:
items:
- const: tx
- const: rx
required:
- compatible
- reg
- interrupts
- dmas
- dma-names
- clocks
- clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
i2s@f8050000 {
compatible = "atmel,sama5d2-i2s";
reg = <0xf8050000 0x300>;
interrupts = <54 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(31))>,
<&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(32))>;
dma-names = "tx", "rx";
clocks = <&i2s0_clk>, <&i2s0_gclk>, <&i2s0muxck>;
clock-names = "pclk", "gclk", "muxclk";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2s0_default>;
};

View File

@@ -0,0 +1,98 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/atmel,sama5d2-pdmic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atmel PDMIC decoder
maintainers:
- Claudiu Beznea <claudiu.beznea@microchip.com>
description:
Atmel Pulse Density Modulation Interface Controller
(PDMIC) peripheral is a mono PDM decoder module
that decodes an incoming PDM sample stream.
properties:
compatible:
const: atmel,sama5d2-pdmic
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: peripheral clock
- description: generated clock
clock-names:
items:
- const: pclk
- const: gclk
dmas:
maxItems: 1
dma-names:
const: rx
atmel,mic-min-freq:
$ref: /schemas/types.yaml#/definitions/uint32
description:
The minimal frequency that the microphone supports.
atmel,mic-max-freq:
$ref: /schemas/types.yaml#/definitions/uint32
description:
The maximal frequency that the microphone supports.
atmel,model:
$ref: /schemas/types.yaml#/definitions/string
default: PDMIC
description: The user-visible name of this sound card.
atmel,mic-offset:
$ref: /schemas/types.yaml#/definitions/int32
default: 0
description: The offset that should be added.
required:
- compatible
- reg
- interrupts
- dmas
- dma-names
- clock-names
- clocks
- atmel,mic-min-freq
- atmel,mic-max-freq
additionalProperties: false
examples:
- |
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
pdmic: sound@f8018000 {
compatible = "atmel,sama5d2-pdmic";
reg = <0xf8018000 0x124>;
interrupts = <48 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(50))>;
dma-names = "rx";
clocks = <&pdmic_clk>, <&pdmic_gclk>;
clock-names = "pclk", "gclk";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pdmic_default>;
atmel,model = "PDMIC@sama5d2_xplained";
atmel,mic-min-freq = <1000000>;
atmel,mic-max-freq = <3246000>;
atmel,mic-offset = <0x0>;
};

View File

@@ -1,55 +0,0 @@
* Atmel ClassD driver under ALSA SoC architecture
Required properties:
- compatible
Should be "atmel,sama5d2-classd".
- reg
Should contain ClassD registers location and length.
- interrupts
Should contain the IRQ line for the ClassD.
- dmas
One DMA specifiers as described in atmel-dma.txt and dma.txt files.
- dma-names
Must be "tx".
- clock-names
Tuple listing input clock names.
Required elements: "pclk" and "gclk".
- clocks
Please refer to clock-bindings.txt.
- assigned-clocks
Should be <&classd_gclk>.
Optional properties:
- pinctrl-names, pinctrl-0
Please refer to pinctrl-bindings.txt.
- atmel,model
The user-visible name of this sound complex.
The default value is "CLASSD".
- atmel,pwm-type
PWM modulation type, "single" or "diff".
The default value is "single".
- atmel,non-overlap-time
Set non-overlapping time, the unit is nanosecond(ns).
There are four values,
<5>, <10>, <15>, <20>, the default value is <10>.
Non-overlapping will be disabled if not specified.
Example:
classd: classd@fc048000 {
compatible = "atmel,sama5d2-classd";
reg = <0xfc048000 0x100>;
interrupts = <59 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(47))>;
dma-names = "tx";
clocks = <&classd_clk>, <&classd_gclk>;
clock-names = "pclk", "gclk";
assigned-clocks = <&classd_gclk>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_classd_default>;
atmel,model = "classd @ SAMA5D2-Xplained";
atmel,pwm-type = "diff";
atmel,non-overlap-time = <10>;
};

View File

@@ -1,46 +0,0 @@
* Atmel I2S controller
Required properties:
- compatible: Should be "atmel,sama5d2-i2s".
- reg: Should be the physical base address of the controller and the
length of memory mapped region.
- interrupts: Should contain the interrupt for the controller.
- dmas: Should be one per channel name listed in the dma-names property,
as described in atmel-dma.txt and dma.txt files.
- dma-names: Two dmas have to be defined, "tx" and "rx".
This IP also supports one shared channel for both rx and tx;
if this mode is used, one "rx-tx" name must be used.
- clocks: Must contain an entry for each entry in clock-names.
Please refer to clock-bindings.txt.
- clock-names: Should be one of each entry matching the clocks phandles list:
- "pclk" (peripheral clock) Required.
- "gclk" (generated clock) Optional (1).
- "muxclk" (I2S mux clock) Optional (1).
Optional properties:
- pinctrl-0: Should specify pin control groups used for this controller.
- princtrl-names: Should contain only one value - "default".
(1) : Only the peripheral clock is required. The generated clock and the I2S
mux clock are optional and should only be set together, when Master Mode
is required.
Example:
i2s@f8050000 {
compatible = "atmel,sama5d2-i2s";
reg = <0xf8050000 0x300>;
interrupts = <54 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(31))>,
<&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(32))>;
dma-names = "tx", "rx";
clocks = <&i2s0_clk>, <&i2s0_gclk>, <&i2s0muxck>;
clock-names = "pclk", "gclk", "muxclk";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2s0_default>;
};

View File

@@ -1,55 +0,0 @@
* Atmel PDMIC driver under ALSA SoC architecture
Required properties:
- compatible
Should be "atmel,sama5d2-pdmic".
- reg
Should contain PDMIC registers location and length.
- interrupts
Should contain the IRQ line for the PDMIC.
- dmas
One DMA specifiers as described in atmel-dma.txt and dma.txt files.
- dma-names
Must be "rx".
- clock-names
Required elements:
- "pclk" peripheral clock
- "gclk" generated clock
- clocks
Must contain an entry for each required entry in clock-names.
Please refer to clock-bindings.txt.
- atmel,mic-min-freq
The minimal frequency that the micphone supports.
- atmel,mic-max-freq
The maximal frequency that the micphone supports.
Optional properties:
- pinctrl-names, pinctrl-0
Please refer to pinctrl-bindings.txt.
- atmel,model
The user-visible name of this sound card.
The default value is "PDMIC".
- atmel,mic-offset
The offset that should be added.
The range is from -32768 to 32767.
The default value is 0.
Example:
pdmic@f8018000 {
compatible = "atmel,sama5d2-pdmic";
reg = <0xf8018000 0x124>;
interrupts = <48 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(50))>;
dma-names = "rx";
clocks = <&pdmic_clk>, <&pdmic_gclk>;
clock-names = "pclk", "gclk";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pdmic_default>;
atmel,model = "PDMIC @ sama5d2_xplained";
atmel,mic-min-freq = <1000000>;
atmel,mic-max-freq = <3246000>;
atmel,mic-offset = <0x0>;
};

View File

@@ -16,7 +16,7 @@ Board connectors:
* Line In Jack
wm8731 pins:
cf Documentation/devicetree/bindings/sound/wm8731.txt
cf Documentation/devicetree/bindings/sound/wlf,wm8731.yaml
Example:
sound {

View File

@@ -1,35 +0,0 @@
DesignWare I2S controller
Required properties:
- compatible : Must be "snps,designware-i2s"
- reg : Must contain the I2S core's registers location and length
- clocks : Pairs of phandle and specifier referencing the controller's
clocks. The controller expects one clock: the clock used as the sampling
rate reference clock sample.
- clock-names : "i2sclk" for the sample rate reference clock.
- dmas: Pairs of phandle and specifier for the DMA channels that are used by
the core. The core expects one or two dma channels: one for transmit and
one for receive.
- dma-names : "tx" for the transmit channel, "rx" for the receive channel.
Optional properties:
- interrupts: The interrupt line number for the I2S controller. Add this
parameter if the I2S controller that you are using does not support DMA.
For more details on the 'dma', 'dma-names', 'clock' and 'clock-names'
properties please check:
* resource-names.txt
* clock/clock-bindings.txt
* dma/dma.txt
Example:
soc_i2s: i2s@7ff90000 {
compatible = "snps,designware-i2s";
reg = <0x0 0x7ff90000 0x0 0x1000>;
clocks = <&scpi_i2sclk 0>;
clock-names = "i2sclk";
#sound-dai-cells = <0>;
dmas = <&dma0 5>;
dma-names = "tx";
};

View File

@@ -1,33 +0,0 @@
NXP MICFIL Digital Audio Interface (MICFIL).
The MICFIL digital interface provides a 16-bit audio signal from a PDM
microphone bitstream in a configurable output sampling rate.
Required properties:
- compatible : Compatible list, contains "fsl,imx8mm-micfil"
or "fsl,imx8mp-micfil"
- reg : Offset and length of the register set for the device.
- interrupts : Contains the micfil interrupts.
- clocks : Must contain an entry for each entry in clock-names.
- clock-names : Must include the "ipg_clk" for register access and
"ipg_clk_app" for internal micfil clock.
- dmas : Generic dma devicetree binding as described in
Documentation/devicetree/bindings/dma/dma.txt.
Example:
micfil: micfil@30080000 {
compatible = "fsl,imx8mm-micfil";
reg = <0x0 0x30080000 0x0 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_PDM_IPG>,
<&clk IMX8MM_CLK_PDM_ROOT>;
clock-names = "ipg_clk", "ipg_clk_app";
dmas = <&sdma2 24 26 0x80000000>;
};

View File

@@ -0,0 +1,85 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/fsl,micfil.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP MICFIL Digital Audio Interface (MICFIL)
maintainers:
- Shengjiu Wang <shengjiu.wang@nxp.com>
description: |
The MICFIL digital interface provides a 16-bit or 24-bit audio signal
from a PDM microphone bitstream in a configurable output sampling rate.
properties:
compatible:
enum:
- fsl,imx8mm-micfil
- fsl,imx8mp-micfil
reg:
maxItems: 1
interrupts:
items:
- description: Digital Microphone interface interrupt
- description: Digital Microphone interface error interrupt
- description: voice activity detector event interrupt
- description: voice activity detector error interrupt
dmas:
items:
- description: DMA controller phandle and request line for RX
dma-names:
items:
- const: rx
clocks:
items:
- description: The ipg clock for register access
- description: internal micfil clock
- description: PLL clock source for 8kHz series
- description: PLL clock source for 11kHz series
- description: External clock 3
minItems: 2
clock-names:
items:
- const: ipg_clk
- const: ipg_clk_app
- const: pll8k
- const: pll11k
- const: clkext3
minItems: 2
required:
- compatible
- reg
- interrupts
- dmas
- dma-names
- clocks
- clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/imx8mm-clock.h>
micfil: audio-controller@30080000 {
compatible = "fsl,imx8mm-micfil";
reg = <0x30080000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_PDM_IPG>,
<&clk IMX8MM_CLK_PDM_ROOT>;
clock-names = "ipg_clk", "ipg_clk_app";
dmas = <&sdma2 24 25 0>;
dma-names = "rx";
};

View File

@@ -2,7 +2,7 @@ fsl,mqs audio CODEC
Required properties:
- compatible : Must contain one of "fsl,imx6sx-mqs", "fsl,codec-mqs"
"fsl,imx8qm-mqs", "fsl,imx8qxp-mqs".
"fsl,imx8qm-mqs", "fsl,imx8qxp-mqs", "fsl,imx93-mqs".
- clocks : A list of phandles + clock-specifiers, one for each entry in
clock-names
- clock-names : "mclk" - must required.

View File

@@ -58,6 +58,8 @@ properties:
slave of the Shared Peripheral Bus and when two or more bus masters
(CPU, DMA or DSP) try to access it. This property is optional depending
on the SoC design.
- description: PLL clock source for 8kHz series rate, optional.
- description: PLL clock source for 11khz series rate, optional.
minItems: 9
clock-names:
@@ -72,6 +74,8 @@ properties:
- const: rxtx6
- const: rxtx7
- const: spba
- const: pll8k
- const: pll11k
minItems: 9
big-endian:

View File

@@ -21,6 +21,9 @@ Required properties:
- clock-names : Must include the "bus" for register access and
"mclk1", "mclk2", "mclk3" for bit clock and frame
clock providing.
"pll8k", "pll11k" are optional, they are the clock
source for root clock, one is for 8kHz series rates
another one is for 11kHz series rates.
- dmas : Generic dma devicetree binding as described in
Documentation/devicetree/bindings/dma/dma.txt.
@@ -49,6 +52,14 @@ Required properties:
receive data by following their own bit clocks and
frame sync clocks separately.
- fsl,dataline : configure the dataline. it has 3 value for each configuration
first one means the type: I2S(1) or PDM(2)
second one is dataline mask for 'rx'
third one is dataline mask for 'tx'.
for example: fsl,dataline = <1 0xff 0xff 2 0xff 0x11>;
it means I2S type rx mask is 0xff, tx mask is 0xff, PDM type
rx mask is 0xff, tx mask is 0x11 (dataline 1 and 4 enabled).
Optional properties:
- big-endian : Boolean property, required if all the SAI

View File

@@ -7,7 +7,9 @@ Must be a child node of PMIC wrapper.
Required properties:
- compatible : "mediatek,mt6358-sound".
- compatible - "string" - One of:
"mediatek,mt6358-sound"
"mediatek,mt6366-sound"
- Avdd-supply : power source of AVDD
Optional properties:

View File

@@ -0,0 +1,175 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/mt8186-afe-pcm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek AFE PCM controller for mt8186
maintainers:
- Jiaxin Yu <jiaxin.yu@mediatek.com>
properties:
compatible:
const: mediatek,mt8186-sound
reg:
maxItems: 1
interrupts:
maxItems: 1
resets:
maxItems: 1
reset-names:
const: audiosys
mediatek,apmixedsys:
$ref: "/schemas/types.yaml#/definitions/phandle"
description: The phandle of the mediatek apmixedsys controller
mediatek,infracfg:
$ref: "/schemas/types.yaml#/definitions/phandle"
description: The phandle of the mediatek infracfg controller
mediatek,topckgen:
$ref: "/schemas/types.yaml#/definitions/phandle"
description: The phandle of the mediatek topckgen controller
clocks:
items:
- description: audio infra sys clock
- description: audio infra 26M clock
- description: audio top mux
- description: audio intbus mux
- description: mainpll 136.5M clock
- description: faud1 mux
- description: apll1 clock
- description: faud2 mux
- description: apll2 clock
- description: audio engen1 mux
- description: apll1_d8 22.5792M clock
- description: audio engen2 mux
- description: apll2_d8 24.576M clock
- description: i2s0 mclk mux
- description: i2s1 mclk mux
- description: i2s2 mclk mux
- description: i2s4 mclk mux
- description: tdm mclk mux
- description: i2s0_mck divider
- description: i2s1_mck divider
- description: i2s2_mck divider
- description: i2s4_mck divider
- description: tdm_mck divider
- description: audio hires mux
- description: 26M clock
clock-names:
items:
- const: aud_infra_clk
- const: mtkaif_26m_clk
- const: top_mux_audio
- const: top_mux_audio_int
- const: top_mainpll_d2_d4
- const: top_mux_aud_1
- const: top_apll1_ck
- const: top_mux_aud_2
- const: top_apll2_ck
- const: top_mux_aud_eng1
- const: top_apll1_d8
- const: top_mux_aud_eng2
- const: top_apll2_d8
- const: top_i2s0_m_sel
- const: top_i2s1_m_sel
- const: top_i2s2_m_sel
- const: top_i2s4_m_sel
- const: top_tdm_m_sel
- const: top_apll12_div0
- const: top_apll12_div1
- const: top_apll12_div2
- const: top_apll12_div4
- const: top_apll12_div_tdm
- const: top_mux_audio_h
- const: top_clk26m_clk
required:
- compatible
- interrupts
- resets
- reset-names
- mediatek,apmixedsys
- mediatek,infracfg
- mediatek,topckgen
- clocks
- clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
afe: mt8186-afe-pcm@11210000 {
compatible = "mediatek,mt8186-sound";
reg = <0x11210000 0x2000>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
resets = <&watchdog 17>; //MT8186_TOPRGU_AUDIO_SW_RST
reset-names = "audiosys";
mediatek,apmixedsys = <&apmixedsys>;
mediatek,infracfg = <&infracfg>;
mediatek,topckgen = <&topckgen>;
clocks = <&infracfg_ao 44>, //CLK_INFRA_AO_AUDIO
<&infracfg_ao 54>, //CLK_INFRA_AO_AUDIO_26M_BCLK
<&topckgen 15>, //CLK_TOP_AUDIO
<&topckgen 16>, //CLK_TOP_AUD_INTBUS
<&topckgen 70>, //CLK_TOP_MAINPLL_D2_D4
<&topckgen 17>, //CLK_TOP_AUD_1
<&apmixedsys 12>, //CLK_APMIXED_APLL1
<&topckgen 18>, //CLK_TOP_AUD_2
<&apmixedsys 13>, //CLK_APMIXED_APLL2
<&topckgen 19>, //CLK_TOP_AUD_ENGEN1
<&topckgen 101>, //CLK_TOP_APLL1_D8
<&topckgen 20>, //CLK_TOP_AUD_ENGEN2
<&topckgen 104>, //CLK_TOP_APLL2_D8
<&topckgen 63>, //CLK_TOP_APLL_I2S0_MCK_SEL
<&topckgen 64>, //CLK_TOP_APLL_I2S1_MCK_SEL
<&topckgen 65>, //CLK_TOP_APLL_I2S2_MCK_SEL
<&topckgen 66>, //CLK_TOP_APLL_I2S4_MCK_SEL
<&topckgen 67>, //CLK_TOP_APLL_TDMOUT_MCK_SEL
<&topckgen 131>, //CLK_TOP_APLL12_CK_DIV0
<&topckgen 132>, //CLK_TOP_APLL12_CK_DIV1
<&topckgen 133>, //CLK_TOP_APLL12_CK_DIV2
<&topckgen 134>, //CLK_TOP_APLL12_CK_DIV4
<&topckgen 135>, //CLK_TOP_APLL12_CK_DIV_TDMOUT_M
<&topckgen 44>, //CLK_TOP_AUDIO_H
<&clk26m>;
clock-names = "aud_infra_clk",
"mtkaif_26m_clk",
"top_mux_audio",
"top_mux_audio_int",
"top_mainpll_d2_d4",
"top_mux_aud_1",
"top_apll1_ck",
"top_mux_aud_2",
"top_apll2_ck",
"top_mux_aud_eng1",
"top_apll1_d8",
"top_mux_aud_eng2",
"top_apll2_d8",
"top_i2s0_m_sel",
"top_i2s1_m_sel",
"top_i2s2_m_sel",
"top_i2s4_m_sel",
"top_tdm_m_sel",
"top_apll12_div0",
"top_apll12_div1",
"top_apll12_div2",
"top_apll12_div4",
"top_apll12_div_tdm",
"top_mux_audio_h",
"top_clk26m_clk";
};
...

View File

@@ -0,0 +1,75 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/mt8186-mt6366-da7219-max98357.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek MT8186 with MT6366, DA7219 and MAX98357 ASoC sound card driver
maintainers:
- Jiaxin Yu <jiaxin.yu@mediatek.com>
description:
This binding describes the MT8186 sound card.
properties:
compatible:
enum:
- mediatek,mt8186-mt6366-da7219-max98357-sound
mediatek,platform:
$ref: "/schemas/types.yaml#/definitions/phandle"
description: The phandle of MT8186 ASoC platform.
headset-codec:
type: object
additionalProperties: false
properties:
sound-dai:
maxItems: 1
required:
- sound-dai
playback-codecs:
type: object
additionalProperties: false
properties:
sound-dai:
items:
- description: phandle of dp codec
- description: phandle of l channel speaker codec
- description: phandle of r channel speaker codec
minItems: 2
required:
- sound-dai
additionalProperties: false
required:
- compatible
- mediatek,platform
- headset-codec
- playback-codecs
examples:
- |
sound: mt8186-sound {
compatible = "mediatek,mt8186-mt6366-da7219-max98357-sound";
mediatek,platform = <&afe>;
pinctrl-names = "aud_clk_mosi_off",
"aud_clk_mosi_on";
pinctrl-0 = <&aud_clk_mosi_off>;
pinctrl-1 = <&aud_clk_mosi_on>;
headset-codec {
sound-dai = <&da7219>;
};
playback-codecs {
sound-dai = <&anx_bridge_dp>,
<&max98357a>;
};
};
...

View File

@@ -0,0 +1,75 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/mt8186-mt6366-rt1019-rt5682s.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek MT8186 with MT6366, RT1019 and RT5682S ASoC sound card driver
maintainers:
- Jiaxin Yu <jiaxin.yu@mediatek.com>
description:
This binding describes the MT8186 sound card.
properties:
compatible:
enum:
- mediatek,mt8186-mt6366-rt1019-rt5682s-sound
mediatek,platform:
$ref: "/schemas/types.yaml#/definitions/phandle"
description: The phandle of MT8186 ASoC platform.
headset-codec:
type: object
additionalProperties: false
properties:
sound-dai:
maxItems: 1
required:
- sound-dai
playback-codecs:
type: object
additionalProperties: false
properties:
sound-dai:
items:
- description: phandle of dp codec
- description: phandle of l channel speaker codec
- description: phandle of r channel speaker codec
minItems: 2
required:
- sound-dai
additionalProperties: false
required:
- compatible
- mediatek,platform
- headset-codec
- playback-codecs
examples:
- |
sound: mt8186-sound {
compatible = "mediatek,mt8186-mt6366-rt1019-rt5682s-sound";
mediatek,platform = <&afe>;
pinctrl-names = "aud_clk_mosi_off",
"aud_clk_mosi_on";
pinctrl-0 = <&aud_clk_mosi_off>;
pinctrl-1 = <&aud_clk_mosi_on>;
headset-codec {
sound-dai = <&rt5682s>;
};
playback-codecs {
sound-dai = <&it6505dptx>,
<&rt1019p>;
};
};
...

View File

@@ -34,7 +34,7 @@ Optional properties:
- nuvoton,jack-eject-debounce: number from 0 to 7 that sets debounce time to 2^(n+2) ms
- nuvoton,dmic-clk-threshold: the ADC threshold of DMIC clock.
- nuvoton,key_enable: Headset button detection switch.
Example:

View File

@@ -110,6 +110,10 @@ patternProperties:
type: object
$ref: nvidia,tegra186-asrc.yaml#
'^processing-engine@[0-9a-f]+$':
type: object
$ref: nvidia,tegra210-ope.yaml#
required:
- compatible
- reg

View File

@@ -0,0 +1,47 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/nvidia,tegra210-mbdrc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Tegra210 MBDRC
description:
The Multi Band Dynamic Range Compressor (MBDRC) is part of Output
Processing Engine (OPE) which interfaces with Audio Hub (AHUB) via
Audio Client Interface (ACIF). MBDRC can be used as a traditional
single full band or a dual band or a multi band dynamic processor.
maintainers:
- Jon Hunter <jonathanh@nvidia.com>
- Mohan Kumar <mkumard@nvidia.com>
- Sameer Pujar <spujar@nvidia.com>
properties:
compatible:
oneOf:
- const: nvidia,tegra210-mbdrc
- items:
- enum:
- nvidia,tegra234-mbdrc
- nvidia,tegra194-mbdrc
- nvidia,tegra186-mbdrc
- const: nvidia,tegra210-mbdrc
reg:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
dynamic-range-compressor@702d8200 {
compatible = "nvidia,tegra210-mbdrc";
reg = <0x702d8200 0x200>;
};
...

View File

@@ -0,0 +1,87 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/nvidia,tegra210-ope.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Tegra210 OPE
description:
The Output Processing Engine (OPE) is one of the AHUB client. It has
PEQ (Parametric Equalizer) and MBDRC (Multi Band Dynamic Range Compressor)
sub blocks for data processing.
maintainers:
- Jon Hunter <jonathanh@nvidia.com>
- Mohan Kumar <mkumard@nvidia.com>
- Sameer Pujar <spujar@nvidia.com>
allOf:
- $ref: name-prefix.yaml#
properties:
compatible:
oneOf:
- const: nvidia,tegra210-ope
- items:
- enum:
- nvidia,tegra234-ope
- nvidia,tegra194-ope
- nvidia,tegra186-ope
- const: nvidia,tegra210-ope
reg:
maxItems: 1
"#address-cells":
const: 1
"#size-cells":
const: 1
ranges: true
sound-name-prefix:
pattern: "^OPE[1-9]$"
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: audio-graph-port.yaml#
unevaluatedProperties: false
description:
OPE ACIF (Audio Client Interface) input port. This is connected
to corresponding ACIF output port on AHUB (Audio Hub).
port@1:
$ref: audio-graph-port.yaml#
unevaluatedProperties: false
description:
OPE ACIF output port. This is connected to corresponding ACIF
input port on AHUB.
patternProperties:
'^equalizer@[0-9a-f]+$':
type: object
$ref: nvidia,tegra210-peq.yaml#
'^dynamic-range-compressor@[0-9a-f]+$':
type: object
$ref: nvidia,tegra210-mbdrc.yaml#
required:
- compatible
- reg
additionalProperties: false
examples:
- |
processing-engine@702d8000 {
compatible = "nvidia,tegra210-ope";
reg = <0x702d8000 0x100>;
sound-name-prefix = "OPE1";
};
...

View File

@@ -0,0 +1,48 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/nvidia,tegra210-peq.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Tegra210 PEQ
description:
The Parametric Equalizer (PEQ) is a cascade of biquad filters with
each filter tuned based on certain parameters. It can be used to
equalize the irregularities in the speaker frequency response.
PEQ sits inside Output Processing Engine (OPE) which interfaces
with Audio Hub (AHUB) via Audio Client Interface (ACIF).
maintainers:
- Jon Hunter <jonathanh@nvidia.com>
- Mohan Kumar <mkumard@nvidia.com>
- Sameer Pujar <spujar@nvidia.com>
properties:
compatible:
oneOf:
- const: nvidia,tegra210-peq
- items:
- enum:
- nvidia,tegra234-peq
- nvidia,tegra194-peq
- nvidia,tegra186-peq
- const: nvidia,tegra210-peq
reg:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
equalizer@702d8100 {
compatible = "nvidia,tegra210-peq";
reg = <0x702d8100 0x100>;
};
...

View File

@@ -15,6 +15,7 @@ allOf:
properties:
compatible:
enum:
- nxp,tfa9890
- nxp,tfa9895
- nxp,tfa9897

View File

@@ -1,91 +0,0 @@
* Qualcomm Technologies Inc. SDM845 ASoC sound card driver
This binding describes the SDM845 sound card, which uses qdsp for audio.
- compatible:
Usage: required
Value type: <stringlist>
Definition: must be one of this
"qcom,sdm845-sndcard"
"qcom,db845c-sndcard"
"lenovo,yoga-c630-sndcard"
- audio-routing:
Usage: Optional
Value type: <stringlist>
Definition: A list of the connections between audio components.
Each entry is a pair of strings, the first being the
connection's sink, the second being the connection's
source. Valid names could be power supplies, MicBias
of codec and the jacks on the board.
- model:
Usage: required
Value type: <stringlist>
Definition: The user-visible name of this sound card.
- aux-devs
Usage: optional
Value type: <array of phandles>
Definition: A list of phandles for auxiliary devices (e.g. analog
amplifiers) that do not appear directly within the DAI
links. Should be connected to another audio component
using "audio-routing".
= dailinks
Each subnode of sndcard represents either a dailink, and subnodes of each
dailinks would be cpu/codec/platform dais.
- link-name:
Usage: required
Value type: <string>
Definition: User friendly name for dai link
= CPU, PLATFORM, CODEC dais subnodes
- cpu:
Usage: required
Value type: <subnode>
Definition: cpu dai sub-node
- codec:
Usage: required
Value type: <subnode>
Definition: codec dai sub-node
- platform:
Usage: Optional
Value type: <subnode>
Definition: platform dai sub-node
- sound-dai:
Usage: required
Value type: <phandle>
Definition: dai phandle/s and port of CPU/CODEC/PLATFORM node.
Example:
audio {
compatible = "qcom,sdm845-sndcard";
model = "sdm845-snd-card";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pri_mi2s_active &pri_mi2s_ws_active>;
pinctrl-1 = <&pri_mi2s_sleep &pri_mi2s_ws_sleep>;
mm1-dai-link {
link-name = "MultiMedia1";
cpu {
sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
};
};
pri-mi2s-dai-link {
link-name = "PRI MI2S Playback";
cpu {
sound-dai = <&q6afedai PRIMARY_MI2S_RX>;
};
platform {
sound-dai = <&q6routing>;
};
};
};

View File

@@ -16,8 +16,11 @@ description:
properties:
compatible:
enum:
- lenovo,yoga-c630-sndcard
- qcom,apq8016-sbc-sndcard
- qcom,db845c-sndcard
- qcom,msm8916-qdsp6-sndcard
- qcom,sdm845-sndcard
- qcom,sm8250-sndcard
- qcom,qrb5165-rb5-sndcard

View File

@@ -127,7 +127,7 @@ properties:
gpio@42:
type: object
$ref: ../gpio/qcom,wcd934x-gpio.yaml#
$ref: /schemas/gpio/qcom,wcd934x-gpio.yaml#
patternProperties:
"^.*@[0-9a-f]+$":

View File

@@ -0,0 +1,74 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/qcom,wsa883x.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Bindings for The Qualcomm WSA8830/WSA8832/WSA8835
smart speaker amplifier
maintainers:
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
description: |
WSA883X is the Qualcomm Aqstic smart speaker amplifier
Their primary operating mode uses a SoundWire digital audio
interface. This binding is for SoundWire interface.
properties:
compatible:
const: sdw10217020200
reg:
maxItems: 1
powerdown-gpios:
description: GPIO spec for Powerdown/Shutdown line to use
maxItems: 1
vdd-supply:
description: VDD Supply for the Codec
'#thermal-sensor-cells':
const: 0
'#sound-dai-cells':
const: 0
required:
- compatible
- reg
- vdd-supply
- powerdown-gpios
- "#thermal-sensor-cells"
- "#sound-dai-cells"
additionalProperties: false
examples:
- |
soundwire-controller@3250000 {
#address-cells = <2>;
#size-cells = <0>;
reg = <0x3250000 0x2000>;
speaker@0,1 {
compatible = "sdw10217020200";
reg = <0 1>;
powerdown-gpios = <&tlmm 1 0>;
vdd-supply = <&vreg_s10b_1p8>;
#thermal-sensor-cells = <0>;
#sound-dai-cells = <0>;
};
speaker@0,2 {
compatible = "sdw10217020200";
reg = <0 2>;
powerdown-gpios = <&tlmm 89 0>;
vdd-supply = <&vreg_s10b_1p8>;
#thermal-sensor-cells = <0>;
#sound-dai-cells = <0>;
};
};
...

View File

@@ -61,6 +61,13 @@ properties:
- const: tx
- const: rx
pinctrl-names:
oneOf:
- const: default
- items:
- const: bclk_on
- const: bclk_off
power-domains:
maxItems: 1

View File

@@ -47,6 +47,7 @@ properties:
description: The bias voltage to be used in mVolts. The voltage can take
values from 1.25V to 3V by 250mV steps. If this node is not mentioned
or the value is unknown, then the value is set to 1.25V.
$ref: "/schemas/types.yaml#/definitions/uint32"
enum: [ 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000 ]
lrclk-strength:

View File

@@ -0,0 +1,94 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/snps,designware-i2s.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: DesignWare I2S controller
maintainers:
- Jose Abreu <joabreu@synopsys.com>
properties:
compatible:
oneOf:
- items:
- const: canaan,k210-i2s
- const: snps,designware-i2s
- enum:
- snps,designware-i2s
reg:
maxItems: 1
interrupts:
description: |
The interrupt line number for the I2S controller. Add this
parameter if the I2S controller that you are using does not
support DMA.
maxItems: 1
clocks:
description: Sampling rate reference clock
maxItems: 1
clock-names:
const: i2sclk
resets:
maxItems: 1
dmas:
items:
- description: TX DMA Channel
- description: RX DMA Channel
minItems: 1
dma-names:
items:
- const: tx
- const: rx
minItems: 1
if:
properties:
compatible:
contains:
const: canaan,k210-i2s
then:
properties:
"#sound-dai-cells":
const: 1
else:
properties:
"#sound-dai-cells":
const: 0
required:
- compatible
- reg
- clocks
- clock-names
oneOf:
- required:
- dmas
- dma-names
- required:
- interrupts
unevaluatedProperties: false
examples:
- |
soc_i2s: i2s@7ff90000 {
compatible = "snps,designware-i2s";
reg = <0x7ff90000 0x1000>;
clocks = <&scpi_i2sclk 0>;
clock-names = "i2sclk";
#sound-dai-cells = <0>;
dmas = <&dma0 5>;
dma-names = "tx";
};

View File

@@ -52,10 +52,6 @@ properties:
DCVDD-supply:
description: Digital core supply regulator for the DCVDD pin.
spi-max-frequency: true
additionalProperties: false
required:
- reg
- compatible
@@ -64,6 +60,11 @@ required:
- DBVDD-supply
- DCVDD-supply
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
spi {

View File

@@ -95,8 +95,6 @@ properties:
- dh,dhcom-board
# DA9053: flexible system level PMIC with multicore support
- dlg,da9053
# DA9063: system PMIC for quad-core application processors
- dlg,da9063
# DMARD05: 3-axis I2C Accelerometer
- domintech,dmard05
# DMARD06: 3-axis I2C Accelerometer
@@ -141,6 +139,8 @@ properties:
- infineon,slb9635tt
# Infineon SLB9645 I2C TPM (new protocol, max 400khz)
- infineon,slb9645tt
# Infineon SLB9673 I2C TPM 2.0
- infineon,slb9673
# Infineon TLV493D-A1B6 I2C 3D Magnetic Sensor
- infineon,tlv493d-a1b6
# Infineon Multi-phase Digital VR Controller xdpe11280

View File

@@ -112,11 +112,11 @@ to register and unregister itself with the core driver:
* Register::
extern int mdev_register_driver(struct mdev_driver *drv);
int mdev_register_driver(struct mdev_driver *drv);
* Unregister::
extern void mdev_unregister_driver(struct mdev_driver *drv);
void mdev_unregister_driver(struct mdev_driver *drv);
The mediated bus driver's probe function should create a vfio_device on top of
the mdev_device and connect it to an appropriate implementation of
@@ -125,8 +125,8 @@ vfio_device_ops.
When a driver wants to add the GUID creation sysfs to an existing device it has
probe'd to then it should call::
extern int mdev_register_device(struct device *dev,
struct mdev_driver *mdev_driver);
int mdev_register_device(struct device *dev,
struct mdev_driver *mdev_driver);
This will provide the 'mdev_supported_types/XX/create' files which can then be
used to trigger the creation of a mdev_device. The created mdev_device will be
@@ -134,7 +134,7 @@ attached to the specified driver.
When the driver needs to remove itself it calls::
extern void mdev_unregister_device(struct device *dev);
void mdev_unregister_device(struct device *dev);
Which will unbind and destroy all the created mdevs and remove the sysfs files.
@@ -260,10 +260,10 @@ Translation APIs for Mediated Devices
The following APIs are provided for translating user pfn to host pfn in a VFIO
driver::
int vfio_pin_pages(struct vfio_device *device, unsigned long *user_pfn,
int npage, int prot, unsigned long *phys_pfn);
int vfio_pin_pages(struct vfio_device *device, dma_addr_t iova,
int npage, int prot, struct page **pages);
int vfio_unpin_pages(struct vfio_device *device, unsigned long *user_pfn,
void vfio_unpin_pages(struct vfio_device *device, dma_addr_t iova,
int npage);
These functions call back into the back-end IOMMU module by using the pin_pages

View File

@@ -448,6 +448,7 @@ Memory Area, or VMA) there is a series of lines such as the following::
MMUPageSize: 4 kB
Rss: 892 kB
Pss: 374 kB
Pss_Dirty: 0 kB
Shared_Clean: 892 kB
Shared_Dirty: 0 kB
Private_Clean: 0 kB
@@ -479,7 +480,9 @@ dirty shared and private pages in the mapping.
The "proportional set size" (PSS) of a process is the count of pages it has
in memory, where each page is divided by the number of processes sharing it.
So if a process has 1000 pages all to itself, and 1000 shared with one other
process, its PSS will be 1500.
process, its PSS will be 1500. "Pss_Dirty" is the portion of PSS which
consists of dirty pages. ("Pss_Clean" is not included, but it can be
calculated by subtracting "Pss_Dirty" from "Pss".)
Note that even a page which is part of a MAP_SHARED mapping, but has only
a single pte mapped, i.e. is currently used by only one process, is accounted
@@ -514,8 +517,10 @@ replaced by copy-on-write) part of the underlying shmem object out on swap.
"SwapPss" shows proportional swap share of this mapping. Unlike "Swap", this
does not take into account swapped out page of underlying shmem objects.
"Locked" indicates whether the mapping is locked in memory or not.
"THPeligible" indicates whether the mapping is eligible for allocating THP
pages - 1 if true, 0 otherwise. It just shows the current status.
pages as well as the THP is PMD mappable or not - 1 if true, 0 otherwise.
It just shows the current status.
"VmFlags" field deserves a separate description. This member represents the
kernel flags associated with the particular virtual memory area in two letter
@@ -1109,7 +1114,7 @@ CommitLimit
yield a CommitLimit of 7.3G.
For more details, see the memory overcommit documentation
in vm/overcommit-accounting.
in mm/overcommit-accounting.
Committed_AS
The amount of memory presently allocated on the system.
The committed memory is a sum of all of the memory which

View File

@@ -128,7 +128,7 @@ needed).
sound/index
crypto/index
filesystems/index
vm/index
mm/index
bpf/index
usb/index
PCI/index

View File

@@ -170,7 +170,7 @@ The users of `ZONE_DEVICE` are:
* hmm: Extend `ZONE_DEVICE` with `->page_fault()` and `->page_free()`
event callbacks to allow a device-driver to coordinate memory management
events related to device-memory, typically GPU memory. See
Documentation/vm/hmm.rst.
Documentation/mm/hmm.rst.
* p2pdma: Create `struct page` objects to allow peer devices in a
PCI/-E topology to coordinate direct-DMA operations between themselves,

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