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KVM: nVMX: Fix handling of lmsw instruction
[ Upstream commit e1d39b17e0 ]
The decision whether or not to exit from L2 to L1 on an lmsw instruction is
based on bogus values: instead of using the information encoded within the
exit qualification, it uses the data also used for the mov-to-cr
instruction, which boils down to using whatever is in %eax at that point.
Use the correct values instead.
Without this fix, an L1 may not get notified when a 32-bit Linux L2
switches its secondary CPUs to protected mode; the L1 is only notified on
the next modification of CR0. This short time window poses a problem, when
there is some other reason to exit to L1 in between. Then, L2 will be
resumed in real mode and chaos ensues.
Signed-off-by: Jan H. Schönherr <jschoenh@amazon.de>
Reviewed-by: Wanpeng Li <wanpeng.li@hotmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
5ea0519a77
commit
a74bec409e
@@ -7924,11 +7924,13 @@ static bool nested_vmx_exit_handled_cr(struct kvm_vcpu *vcpu,
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{
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unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
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int cr = exit_qualification & 15;
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int reg = (exit_qualification >> 8) & 15;
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unsigned long val = kvm_register_readl(vcpu, reg);
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int reg;
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unsigned long val;
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switch ((exit_qualification >> 4) & 3) {
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case 0: /* mov to cr */
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reg = (exit_qualification >> 8) & 15;
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val = kvm_register_readl(vcpu, reg);
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switch (cr) {
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case 0:
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if (vmcs12->cr0_guest_host_mask &
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@@ -7983,6 +7985,7 @@ static bool nested_vmx_exit_handled_cr(struct kvm_vcpu *vcpu,
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* lmsw can change bits 1..3 of cr0, and only set bit 0 of
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* cr0. Other attempted changes are ignored, with no exit.
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*/
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val = (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f;
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if (vmcs12->cr0_guest_host_mask & 0xe &
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(val ^ vmcs12->cr0_read_shadow))
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return true;
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