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spi: rockchip: Mask cs inactive interrupt after dma finished

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The cs inactive logic can always be triggered when the controller
is working, so the interrupt may be triggered when processing the
dma transmission completion interrupt.

Change-Id: I529140e43125ff3a06da67604a17afb585aafd72
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
This commit is contained in:
Jon Lin
2022-12-13 21:27:00 +08:00
committed by Tao Huang
parent 0c670d9d98
commit a786cb4a0b
1 changed files with 4 additions and 0 deletions
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4
drivers/spi/spi-rockchip.c
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@@ -423,6 +423,8 @@ static void rockchip_spi_dma_rxcb(void *data)
writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR);
spi_enable_chip(rs, false);
writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR);
writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR);
spi_finalize_current_transfer(ctlr);
}
@@ -439,6 +441,8 @@ static void rockchip_spi_dma_txcb(void *data)
wait_for_tx_idle(rs, ctlr->slave);
spi_enable_chip(rs, false);
writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR);
writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR);
spi_finalize_current_transfer(ctlr);
}