PM / devfreq: rockchip_dmc: Add support for rk3528

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I90b09d044769747e8858c23f3087c00b2fcb2f12
This commit is contained in:
Wesley Yao
2022-11-07 16:14:00 +08:00
committed by Tao Huang
parent 1f98b6284d
commit a822375383

View File

@@ -1771,6 +1771,79 @@ static __maybe_unused int rk3399_dmc_init(struct platform_device *pdev,
return 0;
}
static __maybe_unused int rk3528_dmc_init(struct platform_device *pdev,
struct rockchip_dmcfreq *dmcfreq)
{
struct arm_smccc_res res;
int ret;
int complt_irq;
u32 complt_hwirq;
struct irq_data *complt_irq_data;
res = sip_smc_dram(0, 0, ROCKCHIP_SIP_CONFIG_DRAM_GET_VERSION);
dev_notice(&pdev->dev, "current ATF version 0x%lx\n", res.a1);
if (res.a0 || res.a1 < 0x100) {
dev_err(&pdev->dev, "trusted firmware need update to V1.00 and above.\n");
return -ENXIO;
}
/*
* first 4KB is used for interface parameters
* after 4KB is dts parameters
* request share memory size 4KB * 2
*/
res = sip_smc_request_share_mem(2, SHARE_PAGE_TYPE_DDR);
if (res.a0 != 0) {
dev_err(&pdev->dev, "no ATF memory for init\n");
return -ENOMEM;
}
ddr_psci_param = (struct share_params *)res.a1;
/* Clear ddr_psci_param, size is 4KB * 2 */
memset_io(ddr_psci_param, 0x0, 4096 * 2);
wait_ctrl.dcf_en = 0;
init_waitqueue_head(&wait_ctrl.wait_wq);
wait_ctrl.wait_en = 1;
wait_ctrl.wait_time_out_ms = 17 * 5;
complt_irq = platform_get_irq_byname(pdev, "complete");
if (complt_irq < 0) {
dev_err(&pdev->dev, "no IRQ for complt_irq: %d\n", complt_irq);
return complt_irq;
}
wait_ctrl.complt_irq = complt_irq;
ret = devm_request_irq(&pdev->dev, complt_irq, wait_dcf_complete_irq,
0, dev_name(&pdev->dev), &wait_ctrl);
if (ret < 0) {
dev_err(&pdev->dev, "cannot request complt_irq\n");
return ret;
}
disable_irq(complt_irq);
complt_irq_data = irq_get_irq_data(complt_irq);
complt_hwirq = irqd_to_hwirq(complt_irq_data);
ddr_psci_param->complt_hwirq = complt_hwirq;
res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0, ROCKCHIP_SIP_CONFIG_DRAM_INIT);
if (res.a0) {
dev_err(&pdev->dev, "rockchip_sip_config_dram_init error:%lx\n", res.a0);
return -ENOMEM;
}
ret = rockchip_get_freq_info(dmcfreq);
if (ret < 0) {
dev_err(&pdev->dev, "cannot get frequency info\n");
return ret;
}
dmcfreq->is_set_rate_direct = true;
dmcfreq->set_auto_self_refresh = rockchip_ddr_set_auto_self_refresh;
return 0;
}
static __maybe_unused int rk3568_dmc_init(struct platform_device *pdev,
struct rockchip_dmcfreq *dmcfreq)
{
@@ -2039,7 +2112,7 @@ static const struct of_device_id rockchip_dmcfreq_of_match[] = {
{ .compatible = "rockchip,rk3399-dmc", .data = rk3399_dmc_init },
#endif
#if IS_ENABLED(CONFIG_CPU_RK3528)
{ .compatible = "rockchip,rk3528-dmc", .data = NULL },
{ .compatible = "rockchip,rk3528-dmc", .data = rk3528_dmc_init },
#endif
#if IS_ENABLED(CONFIG_CPU_RK3562)
{ .compatible = "rockchip,rk3562-dmc", .data = rk3568_dmc_init },