ARM: dts: rockchip: add DSS, VOP and RGB nodes for rv1106

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: Iae549241adfc4418a7c149024385df6b81a55bea
This commit is contained in:
Damon Ding
2022-02-17 09:27:01 +08:00
parent 2f2111686d
commit a87b81ab11

View File

@@ -50,6 +50,12 @@
interrupt-affinity = <&cpu0>;
};
display_subsystem: display-subsystem {
compatible = "rockchip,display-subsystem";
ports = <&vop_out>;
status = "disabled";
};
fiq_debugger: fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
@@ -90,6 +96,27 @@
peri_grf: syscon@ff000000 {
compatible = "rockchip,rv1106-peri-grf", "syscon", "simple-mfd";
reg = <0xff000000 0x1000>;
rgb: rgb {
compatible = "rockchip,rv1106-rgb";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
rgb_in_vop: endpoint@0 {
reg = <0>;
remote-endpoint = <&vop_out_rgb>;
};
};
};
};
};
rtc: rtc@ff1c0000 {
@@ -329,6 +356,27 @@
status = "disabled";
};
vop: vop@ff990000 {
compatible = "rockchip,rv1106-vop";
reg = <0xff990000 0x200>;
reg-names = "regs";
rockchip,grf = <&peri_grf>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
status = "disabled";
vop_out: port {
#address-cells = <1>;
#size-cells = <0>;
vop_out_rgb: endpoint@0 {
reg = <0>;
remote-endpoint = <&rgb_in_vop>;
};
};
};
sdio: mmc@ff9a0000 {
compatible = "rockchip,rv1106-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0xff9a0000 0x4000>;