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arm64: dts: rockchip: Add support for PX30 Z7-A0 board

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Change-Id: Ide6b4520306f21484d206ee3d31c581bbc42226a
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
This commit is contained in:
Wyon Bi
2018-11-28 14:28:56 +08:00
committed by Tao Huang
parent 0573096c0e
commit a8a8abb754
2 changed files with 894 additions and 0 deletions
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1
arch/arm64/boot/dts/rockchip/Makefile
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@@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-lvds-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr4-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ext-rk618.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-z7-a0-rk618-dsi.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk1808-evb-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk1808-fpga.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-ai-va-v10.dtb

893
arch/arm64/boot/dts/rockchip/px30-z7-a0-rk618-dsi.dts Normal file
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@@ -0,0 +1,893 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/display/media-bus-format.h>
#include <dt-bindings/clock/rk618-cru.h>
#include "px30.dtsi"
#include "px30-android.dtsi"
/ {
model = "Rockchip PX30 Z7 A0 board";
compatible = "rockchip,px30-z7-a0", "rockchip,px30";
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 2>;
io-channel-names = "buttons";
poll-interval = <100>;
keyup-threshold-microvolt = <1800000>;
esc-key {
linux,code = <KEY_ESC>;
label = "esc";
press-threshold-microvolt = <1310000>;
};
home-key {
linux,code = <KEY_HOME>;
label = "home";
press-threshold-microvolt = <624000>;
};
menu-key {
linux,code = <KEY_MENU>;
label = "menu";
press-threshold-microvolt = <987000>;
};
vol-down-key {
linux,code = <KEY_VOLUMEDOWN>;
label = "volume down";
press-threshold-microvolt = <300000>;
};
vol-up-key {
linux,code = <KEY_VOLUMEUP>;
label = "volume up";
press-threshold-microvolt = <17000>;
};
};
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm0 0 25000 0>;
brightness-levels = <
0 1 2 3 4 5 6 7
8 9 10 11 12 13 14 15
16 17 18 19 20 21 22 23
24 25 26 27 28 29 30 31
32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255>;
default-brightness-level = <200>;
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable_h>;
/*
* On the module itself this is one of these (depending
* on the actual card populated):
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*/
reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
};
vcc_phy: vcc-phy-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_phy";
regulator-always-on;
regulator-boot-on;
};
vcc5v0_sys: vccsys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
};
&display_subsystem {
status = "okay";
};
&dsi {
status = "okay";
panel@0 {
compatible = "simple-panel-dsi";
reg = <0>;
power-supply = <&vcc3v3_lcd>;
backlight = <&backlight>;
reset-gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>;
prepare-delay-ms = <20>;
reset-delay-ms = <20>;
init-delay-ms = <20>;
enable-delay-ms = <120>;
disable-delay-ms = <20>;
unprepare-delay-ms = <20>;
width-mm = <95>;
height-mm = <151>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
15 00 02 b0 00
15 00 02 d6 01
39 00 06 b3 14 08 00 22 00
15 00 02 b4 0c
15 00 02 de 00
39 00 03 b6 3a d3
15 00 02 51 e0
15 00 02 53 04
15 00 02 3a 77
15 00 02 35 01
39 00 05 2a 00 00 04 af
39 00 05 2b 00 00 07 7f
05 96 01 29
05 14 01 11
];
panel-exit-sequence = [
05 00 01 28
05 00 01 10
];
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <156000000>;
hactive = <1200>;
vactive = <1920>;
hback-porch = <60>;
hfront-porch = <80>;
vback-porch = <4>;
vfront-porch = <4>;
hsync-len = <10>;
vsync-len = <1>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
};
};
&mipi_dphy {
status = "okay";
};
&dsi_in_vopb {
status = "okay";
};
&dsi_in_vopl {
status = "disabled";
};
&route_dsi {
connect = <&vopb_out_dsi>;
status = "okay";
};
&bus_apll {
bus-supply = <&vdd_logic>;
status = "okay";
};
&cpu0 {
cpu-supply = <&vdd_arm>;
};
&dfi {
status = "okay";
};
&dmc {
center-supply = <&vdd_logic>;
auto-freq-en = <0>;
status = "okay";
};
&emmc {
bus-width = <8>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
supports-emmc;
disable-wp;
non-removable;
num-slots = <1>;
status = "okay";
};
&gpu {
mali-supply = <&vdd_logic>;
status = "okay";
};
&i2c0 {
status = "okay";
rk809: pmic@20 {
compatible = "rockchip,rk809";
reg = <0x20>;
interrupt-parent = <&gpio0>;
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default", "pmic-sleep",
"pmic-power-off", "pmic-reset";
pinctrl-0 = <&pmic_int>;
pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
rockchip,system-power-controller;
wakeup-source;
#clock-cells = <1>;
clock-output-names = "rk808-clkout1", "rk808-clkout2";
pmic-reset-func = <1>;
vcc1-supply = <&vcc5v0_sys>;
vcc2-supply = <&vcc5v0_sys>;
vcc3-supply = <&vcc5v0_sys>;
vcc4-supply = <&vcc5v0_sys>;
vcc5-supply = <&vcc3v3_sys>;
vcc6-supply = <&vcc3v3_sys>;
vcc7-supply = <&vcc3v3_sys>;
vcc8-supply = <&vcc3v3_sys>;
vcc9-supply = <&vcc5v0_sys>;
pwrkey {
status = "okay";
};
pinctrl_rk8xx: pinctrl_rk8xx {
gpio-controller;
#gpio-cells = <2>;
rk817_slppin_null: rk817_slppin_null {
pins = "gpio_slp";
function = "pin_fun0";
};
rk817_slppin_slp: rk817_slppin_slp {
pins = "gpio_slp";
function = "pin_fun1";
};
rk817_slppin_pwrdn: rk817_slppin_pwrdn {
pins = "gpio_slp";
function = "pin_fun2";
};
rk817_slppin_rst: rk817_slppin_rst {
pins = "gpio_slp";
function = "pin_fun3";
};
};
regulators {
vdd_logic: DCDC_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_logic";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <950000>;
};
};
vdd_arm: DCDC_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_arm";
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <950000>;
};
};
vcc_ddr: DCDC_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_ddr";
regulator-initial-mode = <0x2>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc_3v0: DCDC_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-initial-mode = <0x2>;
regulator-name = "vcc_3v0";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3000000>;
};
};
vcc_1v0: LDO_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-name = "vcc_1v0";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1000000>;
};
};
vcc1v8_soc: LDO_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc1v8_soc";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vdd1v0_soc: LDO_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-name = "vcc1v0_soc";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1000000>;
};
};
vcc3v0_pmu: LDO_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc3v0_pmu";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vccio_sd: LDO_REG5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vccio_sd";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcc_sd: LDO_REG6 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc_sd";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcc2v8_dvp: LDO_REG7 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "vcc2v8_dvp";
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <2800000>;
};
};
vcc1v8_dvp: LDO_REG8 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc1v8_dvp";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vdd1v5_dvp: LDO_REG9 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-name = "vdd1v5_dvp";
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <1500000>;
};
};
vcc3v3_sys: DCDC_REG5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc3v3_sys";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcc5v0_host: SWITCH_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc5v0_host";
};
vcc3v3_lcd: SWITCH_REG2 {
regulator-boot-on;
regulator-name = "vcc3v3_lcd";
};
};
};
rk618@50 {
compatible = "rockchip,rk618";
reg = <0x50>;
pinctrl-names = "default";
pinctrl-0 = <&i2s1_2ch_mclk>;
clocks = <&cru SCLK_I2S1_OUT>;
clock-names = "clkin";
assigned-clocks = <&cru SCLK_I2S1_OUT>;
assigned-clock-rates = <12000000>;
reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
status = "okay";
CRU: cru {
compatible = "rockchip,rk618-cru";
clocks = <&cru SCLK_I2S1_OUT>, <&cru DCLK_VOPL>;
clock-names = "clkin", "lcdc0_dclkp";
assigned-clocks = <&CRU SCALER_PLLIN_CLK>, <&CRU VIF_PLLIN_CLK>,
<&CRU SCALER_CLK>, <&CRU VIF0_PRE_CLK>,
<&CRU CODEC_CLK>, <&CRU DITHER_CLK>;
assigned-clock-parents = <&cru SCLK_I2S1_OUT>, <&CRU LCDC0_CLK>,
<&CRU SCALER_PLL_CLK>, <&CRU VIF_PLL_CLK>,
<&cru SCLK_I2S1_OUT>, <&CRU VIF0_CLK>;
#clock-cells = <1>;
status = "okay";
};
dsi {
compatible = "rockchip,rk618-dsi";
clocks = <&CRU MIPI_CLK>;
clock-names = "dsi";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
bridge_input_rgb: endpoint {
remote-endpoint = <&rgb_out_bridge>;
};
};
};
panel@0 {
compatible = "simple-panel-dsi";
reg = <0>;
power-supply = <&vcc3v3_lcd>;
backlight = <&backlight>;
reset-gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
prepare-delay-ms = <20>;
reset-delay-ms = <20>;
init-delay-ms = <20>;
enable-delay-ms = <120>;
disable-delay-ms = <20>;
unprepare-delay-ms = <20>;
width-mm = <95>;
height-mm = <151>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
15 00 02 b0 00
15 00 02 d6 01
39 00 06 b3 14 08 00 22 00
15 00 02 b4 0c
15 00 02 DE 00
39 00 03 b6 3a d3
15 00 02 51 E0
15 00 02 53 04
15 00 02 3a 77
15 00 02 35 01
39 00 05 2A 00 00 04 AF
39 00 05 2B 00 00 07 7F
05 96 01 29
05 14 01 11
];
panel-exit-sequence = [
05 00 01 28
05 00 01 10
];
display-timings {
native-mode = <&timing1>;
timing1: timing1 {
clock-frequency = <156000000>;
hactive = <1200>;
vactive = <1920>;
hback-porch = <60>;
hfront-porch = <80>;
vback-porch = <4>;
vfront-porch = <4>;
hsync-len = <10>;
vsync-len = <1>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
};
};
};
};
&io_domains {
vccio1-supply = <&vcc1v8_soc>;
vccio2-supply = <&vccio_sd>;
vccio3-supply = <&vcc_3v0>;
vccio4-supply = <&vcc3v0_pmu>;
vccio5-supply = <&vcc_3v0>;
status = "okay";
};
&nandc0 {
status = "okay";
};
&pmu_io_domains {
status = "okay";
pmuio1-supply = <&vcc3v0_pmu>;
pmuio2-supply = <&vcc3v0_pmu>;
};
&pwm0 {
status = "okay";
};
&rk_rga {
status = "okay";
};
&rockchip_suspend {
rockchip,sleep-debug-en = <1>;
status = "okay";
};
&saradc {
vref-supply = <&vcc1v8_soc>;
status = "okay";
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
supports-sd;
card-detect-delay = <800>;
ignore-pm-notify;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
vqmmc-supply = <&vccio_sd>;
vmmc-supply = <&vcc_sd>;
status = "okay";
};
&sdio {
bus-width = <4>;
cap-sd-highspeed;
supports-sdio;
ignore-pm-notify;
keep-power-in-suspend;
non-removable;
mmc-pwrseq = <&sdio_pwrseq>;
sd-uhs-sdr104;
status = "okay";
};
&tsadc {
pinctrl-names = "init", "default";
pinctrl-0 = <&tsadc_otp_gpio>;
pinctrl-1 = <&tsadc_otp_out>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_xfer &uart1_cts>;
status = "okay";
};
&u2phy {
status = "okay";
u2phy_host: host-port {
status = "okay";
};
u2phy_otg: otg-port {
status = "okay";
};
};
&usb20_otg {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&vopb {
status = "okay";
};
&vopb_mmu {
status = "okay";
};
&vopl {
status = "okay";
};
&vopl_mmu {
status = "okay";
};
&vpu_combo {
status = "okay";
};
&rgb {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&lcdc_rgb_pins>;
pinctrl-1 = <&lcdc_sleep_pins>;
status = "okay";
ports {
port@1 {
reg = <1>;
rgb_out_bridge: endpoint {
remote-endpoint = <&bridge_input_rgb>;
};
};
};
};
&rgb_in_vopl {
status = "okay";
};
&rgb_in_vopb {
status = "disabled";
};
&route_rgb {
connect = <&vopl_out_rgb>;
status = "disabled";
};
&pinctrl {
lcdc {
lcdc_rgb_pins: lcdc-rgb-pins {
rockchip,pins =
<3 RK_PA0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DCLK */
<3 RK_PA1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_HSYNC */
<3 RK_PA2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_VSYNC */
<3 RK_PA3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DEN */
<3 RK_PD3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D23 */
<3 RK_PD2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D22 */
<3 RK_PD1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D21 */
<3 RK_PD0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D20 */
<3 RK_PC7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D19 */
<3 RK_PC6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D18 */
<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D17 */
<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D16 */
<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D15 */
<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D14 */
<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D13 */
<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D12 */
<3 RK_PB7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D11 */
<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D10 */
<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D9 */
<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D8 */
<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D7 */
<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D6 */
<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D5 */
<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D4 */
<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D3 */
<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D2 */
<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D1 */
<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_8ma>; /* LCDC_D0 */
};
lcdc_sleep_pins: lcdc-sleep-pins {
rockchip,pins =
<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */
<3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_HSYNC */
<3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_VSYNC */
<3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DEN */
<3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D23 */
<3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D22 */
<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D21 */
<3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D20 */
<3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D19 */
<3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D18 */
<3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D17 */
<3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */
<3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */
<3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */
<3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */
<3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */
<3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D11 */
<3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D10 */
<3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */
<3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D8 */
<3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */
<3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */
<3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D5 */
<3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D4 */
<3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D3 */
<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */
<3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D1 */
<3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D0 */
};
};
pmic {
pmic_int: pmic_int {
rockchip,pins =
<0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
};
soc_slppin_gpio: soc_slppin_gpio {
rockchip,pins =
<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
};
soc_slppin_slp: soc_slppin_slp {
rockchip,pins =
<0 RK_PA4 RK_FUNC_1 &pcfg_pull_none>;
};
soc_slppin_rst: soc_slppin_rst {
rockchip,pins =
<0 RK_PA4 RK_FUNC_2 &pcfg_pull_none>;
};
};
sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&firmware_android {
compatible = "android,firmware";
fstab {
compatible = "android,fstab";
system {
compatible = "android,system";
dev = "/dev/block/by-name/system";
type = "ext4";
mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
fsmgr_flags = "wait";
};
vendor {
compatible = "android,vendor";
dev = "/dev/block/by-name/vendor";
type = "ext4";
mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
fsmgr_flags = "wait";
};
};
};