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CHROMIUM: drm: bridge/dw_hdmi: Reorder soft reset of i2c

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We should really do the reset of i2c before we set the speed.  There are
no actual known problems fixed by this, but it seems like a good idea
and the latest upstream patch does this.

BUG=chrome-os-partner:34741
TEST=HDMI vs. suspend/resume, broken monitor, HDCP, etc.

Change-Id: I5207f39e074b7ab0d56d945bd1ae74d06f89c74b
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/302629
Commit-Ready: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
This commit is contained in:
Douglas Anderson
2015-09-28 09:26:04 -07:00
committed by Huang, Tao
parent 76a5a5a328
commit a9461aae8f
1 changed files with 3 additions and 3 deletions
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6
drivers/gpu/drm/bridge/dw-hdmi.c
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@@ -271,12 +271,12 @@ static void hdmi_mask_writeb(struct dw_hdmi *hdmi, u8 data, unsigned int reg,
static void dw_hdmi_i2c_init(struct dw_hdmi *hdmi)
{
/* Set Standard Mode speed */
hdmi_writeb(hdmi, 0x03, HDMI_I2CM_DIV);
/* Software reset */
hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ);
/* Set Standard Mode speed */
hdmi_writeb(hdmi, 0x03, HDMI_I2CM_DIV);
/* Set done, not acknowledged and arbitration interrupt polarities */
hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT);
hdmi_writeb(hdmi, HDMI_I2CM_CTLINT_NAC_POL | HDMI_I2CM_CTLINT_ARB_POL,