pinctrl: separate soc drivers [3/4]

PD#157965: pinctrl: separate soc drivers

When meson pinctrl is enabled, all meson platforms pinctrl drivers are
built in the kernel, with a significant amount of data.

This leads to situation where pinctrl drivers targeting an architecture
are also compiled and shipped on another one (ex: meson8 - ARM - compiled
and shipped on ARM64 builds). This is a waste of memory we can easily
avoid.

This change makes 3 pinctrl drivers (1 per SoC) out the original single
driver, allowing to compile and ship only the ones required.

porting from the upstream v4.15-rc2, commits as follows:

commit 277d14eb81

Change-Id: I68832eaf4a86233f89b8c32c44aaaab3593711d7
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
This commit is contained in:
Xingyu Chen
2017-12-14 15:59:11 +08:00
committed by Jianxin Pan
parent 82ff7d6623
commit aa56afbe1e
11 changed files with 273 additions and 224 deletions

View File

@@ -169,6 +169,7 @@ CONFIG_AMLOGIC_UART=y
CONFIG_AMLOGIC_SERIAL_MESON_CONSOLE=y
CONFIG_AMLOGIC_IOMAP=y
CONFIG_AMLOGIC_PINCTRL=y
CONFIG_AMLOGIC_PINCTRL_MESON8B=y
CONFIG_AMLOGIC_USB=y
CONFIG_AMLOGIC_USB_DWC_OTG_HCD=y
CONFIG_AMLOGIC_USB_HOST_ELECT_TEST=y

View File

@@ -202,6 +202,9 @@ CONFIG_AMLOGIC_UART=y
CONFIG_AMLOGIC_SERIAL_MESON_CONSOLE=y
CONFIG_AMLOGIC_IOMAP=y
CONFIG_AMLOGIC_PINCTRL=y
CONFIG_AMLOGIC_PINCTRL_MESON_GXL=y
CONFIG_AMLOGIC_PINCTRL_MESON_AXG=y
CONFIG_AMLOGIC_PINCTRL_MESON_TXLX=y
CONFIG_AMLOGIC_USB=y
CONFIG_AMLOGIC_USB_DWC_OTG_HCD=y
CONFIG_AMLOGIC_USB_HOST_ELECT_TEST=y

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@@ -194,6 +194,9 @@ CONFIG_AMLOGIC_UART=y
CONFIG_AMLOGIC_SERIAL_MESON_CONSOLE=y
CONFIG_AMLOGIC_IOMAP=y
CONFIG_AMLOGIC_PINCTRL=y
CONFIG_AMLOGIC_PINCTRL_MESON_GXL=y
CONFIG_AMLOGIC_PINCTRL_MESON_AXG=y
CONFIG_AMLOGIC_PINCTRL_MESON_TXLX=y
CONFIG_AMLOGIC_USB=y
CONFIG_AMLOGIC_USB_DWC_OTG_HCD=y
CONFIG_AMLOGIC_USB_HOST_ELECT_TEST=y

View File

@@ -1,15 +1,33 @@
# Amlogic PINCTRL
menuconfig AMLOGIC_PINCTRL
bool "PINCTRL/GPIO support"
select OF
select PINCTRL
select PINMUX
select PINCONF
select GENERIC_PINCONF
select GPIOLIB
select OF_GPIO
select REGMAP_MMIO
if AMLOGIC_PINCTRL
config AMLOGIC_PINCTRL
bool "PINCTRL/GPIO support"
select OF
select PINCTRL
select PINMUX
select PINCONF
select GENERIC_PINCONF
select GPIOLIB
select OF_GPIO
select GPIOLIB_IRQCHIP
help
This is the Amlogic PINCTRL/GPIO driver
config AMLOGIC_PINCTRL_MESON8B
bool "Meson 8b SoC pinctrl driver"
depends on ARM
default n
config AMLOGIC_PINCTRL_MESON_GXL
bool "Meson gxl SoC pinctrl driver"
depends on ARM64
default n
config AMLOGIC_PINCTRL_MESON_AXG
bool "Meson axg SoC pinctrl driver"
depends on ARM64
default n
config AMLOGIC_PINCTRL_MESON_TXLX
bool "Meson txlx SoC pinctrl driver"
depends on ARM64
default n
endif

View File

@@ -1,5 +1,8 @@
#
#Makefile for the gpio dirver
#Makefile for the pinctrl dirver
#
obj-$(CONFIG_AMLOGIC_PINCTRL) += pinctrl-meson.o pinctrl_gxl.o pinctrl-meson8b.o \
pinctrl-mesonaxg.o pinctrl-meson-txlx.o
obj-$(CONFIG_AMLOGIC_PINCTRL) += pinctrl-meson.o
obj-$(CONFIG_AMLOGIC_PINCTRL_MESON8B) += pinctrl-meson8b.o
obj-$(CONFIG_AMLOGIC_PINCTRL_MESON_GXL) += pinctrl_gxl.o
obj-$(CONFIG_AMLOGIC_PINCTRL_MESON_AXG) += pinctrl-mesonaxg.o
obj-$(CONFIG_AMLOGIC_PINCTRL_MESON_TXLX) += pinctrl-meson-txlx.o

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@@ -1413,8 +1413,19 @@ static struct meson_bank meson_txlx_aobus_banks[] = {
0, 30, 0, 14, 0, 14, 0, 31, 1, 31),
};
int meson_txlx_aobus_init(struct meson_pinctrl *pc)
{
struct arm_smccc_res res;
/*set TEST_N to output*/
arm_smccc_smc(CMD_TEST_N_DIR, TEST_N_OUTPUT, 0, 0, 0, 0, 0, 0, &res);
return 0;
}
struct meson_pinctrl_data meson_txlx_periphs_pinctrl_data = {
.name = "periphs-banks",
.pinmux_type = PINMUX_V1,
.init = NULL,
.pins = meson_txlx_periphs_pins,
.groups = meson_txlx_periphs_groups,
.funcs = meson_txlx_periphs_functions,
@@ -1427,6 +1438,8 @@ struct meson_pinctrl_data meson_txlx_periphs_pinctrl_data = {
struct meson_pinctrl_data meson_txlx_aobus_pinctrl_data = {
.name = "aobus-banks",
.pinmux_type = PINMUX_V1,
.init = meson_txlx_aobus_init,
.pins = meson_txlx_aobus_pins,
.groups = meson_txlx_aobus_groups,
.funcs = meson_txlx_aobus_functions,
@@ -1437,11 +1450,37 @@ struct meson_pinctrl_data meson_txlx_aobus_pinctrl_data = {
.num_banks = ARRAY_SIZE(meson_txlx_aobus_banks),
};
int meson_txlx_aobus_init(struct meson_pinctrl *pc)
{
struct arm_smccc_res res;
/*set TEST_N to output*/
arm_smccc_smc(CMD_TEST_N_DIR, TEST_N_OUTPUT, 0, 0, 0, 0, 0, 0, &res);
static const struct of_device_id meson_txlx_pinctrl_dt_match[] = {
{
.compatible = "amlogic,meson-txlx-periphs-pinctrl",
.data = &meson_txlx_periphs_pinctrl_data,
},
{
.compatible = "amlogic,meson-txlx-aobus-pinctrl",
.data = &meson_txlx_aobus_pinctrl_data,
},
return 0;
};
static struct platform_driver meson_txlx_pinctrl_driver = {
.probe = meson_pinctrl_probe,
.driver = {
.name = "meson-txlx-pinctrl",
.of_match_table = meson_txlx_pinctrl_dt_match,
},
};
static int __init txlx_pmx_init(void)
{
return platform_driver_register(&meson_txlx_pinctrl_driver);
}
static void __exit txlx_pmx_exit(void)
{
platform_driver_unregister(&meson_txlx_pinctrl_driver);
}
arch_initcall(txlx_pmx_init);
module_exit(txlx_pmx_exit);
MODULE_DESCRIPTION("txlx pin control driver");
MODULE_LICENSE("GPL v2");

View File

@@ -684,92 +684,6 @@ static int meson_gpio_to_irq(struct gpio_chip *chip, unsigned int gpio)
return irq_create_fwspec_mapping(&fwspec);
}
struct meson_pinctrl_private meson_gxl_periphs = {
.pinmux_type = PINMUX_V1,
.pinctrl_data = &meson_gxl_periphs_pinctrl_data,
.init = meson_gxl_periphs_init,
};
struct meson_pinctrl_private meson_gxl_aobus = {
.pinmux_type = PINMUX_V1,
.pinctrl_data = &meson_gxl_aobus_pinctrl_data,
.init = meson_gxl_aobus_init,
};
struct meson_pinctrl_private meson_m8b_cbus = {
.pinmux_type = PINMUX_V1,
.pinctrl_data = &meson8b_cbus_pinctrl_data,
.init = NULL,
};
struct meson_pinctrl_private meson_m8b_aobus = {
.pinmux_type = PINMUX_V1,
.pinctrl_data = &meson8b_aobus_pinctrl_data,
.init = NULL,
};
struct meson_pinctrl_private meson_axg_periphs = {
.pinmux_type = PINMUX_V2,
.pinctrl_data = &meson_axg_periphs_pinctrl_data,
.init = NULL,
};
struct meson_pinctrl_private meson_axg_aobus = {
.pinmux_type = PINMUX_V2,
.pinctrl_data = &meson_axg_aobus_pinctrl_data,
.init = meson_axg_aobus_init,
};
struct meson_pinctrl_private meson_txlx_periphs = {
.pinmux_type = PINMUX_V1,
.pinctrl_data = &meson_txlx_periphs_pinctrl_data,
.init = NULL,
};
struct meson_pinctrl_private meson_txlx_aobus = {
.pinmux_type = PINMUX_V1,
.pinctrl_data = &meson_txlx_aobus_pinctrl_data,
.init = meson_txlx_aobus_init,
};
static const struct of_device_id meson_pinctrl_dt_match[] = {
{
.compatible = "amlogic,meson-gxl-periphs-pinctrl",
.data = &meson_gxl_periphs,
},
{
.compatible = "amlogic,meson-gxl-aobus-pinctrl",
.data = &meson_gxl_aobus,
},
{
.compatible = "amlogic,meson8b-cbus-pinctrl",
.data = &meson_m8b_cbus,
},
{
.compatible = "amlogic,meson8b-aobus-pinctrl",
.data = &meson_m8b_aobus,
},
{
.compatible = "amlogic,meson-axg-periphs-pinctrl",
.data = &meson_axg_periphs,
},
{
.compatible = "amlogic,meson-axg-aobus-pinctrl",
.data = &meson_axg_aobus,
},
{
.compatible = "amlogic,meson-txlx-periphs-pinctrl",
.data = &meson_txlx_periphs,
},
{
.compatible = "amlogic,meson-txlx-aobus-pinctrl",
.data = &meson_txlx_aobus,
},
{ },
};
MODULE_DEVICE_TABLE(of, meson_pinctrl_dt_match);
static int meson_gpiolib_register(struct meson_pinctrl *pc)
{
int ret;
@@ -1023,10 +937,8 @@ static int meson_pinctrl_build_state(struct meson_pinctrl *pc)
return 0;
}
static int meson_pinctrl_probe(struct platform_device *pdev)
int meson_pinctrl_probe(struct platform_device *pdev)
{
struct meson_pinctrl_private *priv;
const struct of_device_id *match;
struct pinctrl_pin_desc *pins;
struct device *dev = &pdev->dev;
struct meson_pinctrl *pc;
@@ -1038,15 +950,13 @@ static int meson_pinctrl_probe(struct platform_device *pdev)
return -ENOMEM;
pc->dev = dev;
match = of_match_node(meson_pinctrl_dt_match, pdev->dev.of_node);
priv = (struct meson_pinctrl_private *)match->data;
pc->data = (struct meson_pinctrl_data *) priv->pinctrl_data;
pc->data = (struct meson_pinctrl_data *) of_device_get_match_data(dev);
ret = meson_pinctrl_parse_dt(pc, pdev->dev.of_node);
ret = meson_pinctrl_parse_dt(pc, dev->of_node);
if (ret)
return ret;
if (priv->pinmux_type == PINMUX_V2) {
if (pc->data->pinmux_type == PINMUX_V2) {
ret = meson_pinctrl_build_state(pc);
if (ret)
dev_err(pc->dev, "can't register pinctrl device\n");
@@ -1065,49 +975,20 @@ static int meson_pinctrl_probe(struct platform_device *pdev)
pc->desc.pins = pc->data->pins;
}
if (pc->data->init)
pc->data->init(pc);
pc->desc.name = "pinctrl-meson";
pc->desc.owner = THIS_MODULE;
pc->desc.pctlops = &meson_pctrl_ops;
pc->desc.confops = &meson_pinconf_ops;
pc->desc.npins = pc->data->num_pins;
pc->pcdev = pinctrl_register(&pc->desc, pc->dev, pc);
pc->pcdev = devm_pinctrl_register(pc->dev, &pc->desc, pc);
if (IS_ERR(pc->pcdev)) {
dev_err(pc->dev, "can't register pinctrl device");
return PTR_ERR(pc->pcdev);
}
ret = meson_gpiolib_register(pc);
if (ret) {
pinctrl_unregister(pc->pcdev);
return ret;
}
if (priv->init)
priv->init(pc);
return 0;
return meson_gpiolib_register(pc);
}
static struct platform_driver meson_pinctrl_driver = {
.probe = meson_pinctrl_probe,
.driver = {
.name = "meson-pinctrl",
.of_match_table = meson_pinctrl_dt_match,
},
};
static int __init gxl_pmx_init(void)
{
return platform_driver_register(&meson_pinctrl_driver);
}
static void __exit gxl_pmx_exit(void)
{
platform_driver_unregister(&meson_pinctrl_driver);
}
arch_initcall(gxl_pmx_init);
module_exit(gxl_pmx_exit);
MODULE_DESCRIPTION("gxl pin control driver");
MODULE_LICENSE("GPL v2");

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@@ -17,8 +17,10 @@
#include <linux/gpio.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/types.h>
#include <linux/module.h>
/**
* struct meson_pmx_group - a pinmux group
@@ -101,8 +103,11 @@ struct meson_bank {
struct meson_reg_desc regs[NUM_REG];
};
struct meson_pinctrl;
struct meson_pinctrl_data {
unsigned char pinmux_type;
const char *name;
int (*init)(struct meson_pinctrl *);
const struct pinctrl_pin_desc *pins;
struct meson_pmx_group *groups;
struct meson_pmx_func *funcs;
@@ -128,12 +133,6 @@ struct meson_pinctrl {
struct device_node *of_irq;
};
struct meson_pinctrl_private {
unsigned char pinmux_type;
struct meson_pinctrl_data *pinctrl_data;
int (*init)(struct meson_pinctrl *pc);
};
struct meson_desc_function {
const char *name;
unsigned char muxval;
@@ -220,18 +219,4 @@ enum PINMUX_TYPE {
__VA_ARGS__, { } }, \
}
extern struct meson_pinctrl_data meson8_cbus_pinctrl_data;
extern struct meson_pinctrl_data meson8_aobus_pinctrl_data;
extern struct meson_pinctrl_data meson8b_cbus_pinctrl_data;
extern struct meson_pinctrl_data meson8b_aobus_pinctrl_data;
extern struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data;
extern struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data;
extern struct meson_pinctrl_data meson_axg_periphs_pinctrl_data;
extern struct meson_pinctrl_data meson_axg_aobus_pinctrl_data;
extern struct meson_pinctrl_data meson_txlx_periphs_pinctrl_data;
extern struct meson_pinctrl_data meson_txlx_aobus_pinctrl_data;
extern int meson_gxl_aobus_init(struct meson_pinctrl *pc);
extern int meson_gxl_periphs_init(struct meson_pinctrl *pc);
extern int meson_axg_aobus_init(struct meson_pinctrl *pc);
extern int meson_txlx_aobus_init(struct meson_pinctrl *pc);
extern int meson_pinctrl_probe(struct platform_device *pdev);

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@@ -941,8 +941,10 @@ static struct meson_bank meson8b_aobus_banks[] = {
0, 0, 0, 16, 0, 0, 0, 16, 1, 0),
};
struct meson_pinctrl_data meson8b_cbus_pinctrl_data = {
static struct meson_pinctrl_data meson8b_cbus_pinctrl_data = {
.name = "cbus-banks",
.pinmux_type = PINMUX_V1,
.init = NULL,
.pins = meson8b_cbus_pins,
.groups = meson8b_cbus_groups,
.funcs = meson8b_cbus_functions,
@@ -953,8 +955,10 @@ struct meson_pinctrl_data meson8b_cbus_pinctrl_data = {
.num_banks = ARRAY_SIZE(meson8b_cbus_banks),
};
struct meson_pinctrl_data meson8b_aobus_pinctrl_data = {
static struct meson_pinctrl_data meson8b_aobus_pinctrl_data = {
.name = "aobus-banks",
.pinmux_type = PINMUX_V1,
.init = NULL,
.pins = meson8b_aobus_pins,
.groups = meson8b_aobus_groups,
.funcs = meson8b_aobus_functions,
@@ -964,3 +968,37 @@ struct meson_pinctrl_data meson8b_aobus_pinctrl_data = {
.num_funcs = ARRAY_SIZE(meson8b_aobus_functions),
.num_banks = ARRAY_SIZE(meson8b_aobus_banks),
};
static const struct of_device_id meson8b_pinctrl_dt_match[] = {
{
.compatible = "amlogic,meson8b-cbus-pinctrl",
.data = &meson8b_cbus_pinctrl_data,
},
{
.compatible = "amlogic,meson8b-aobus-pinctrl",
.data = &meson8b_aobus_pinctrl_data,
}
};
static struct platform_driver meson8b_pinctrl_driver = {
.probe = meson_pinctrl_probe,
.driver = {
.name = "meson8b-pinctrl",
.of_match_table = meson8b_pinctrl_dt_match,
},
};
static int __init meson8b_pmx_init(void)
{
return platform_driver_register(&meson8b_pinctrl_driver);
}
static void __exit meson8b_pmx_exit(void)
{
platform_driver_unregister(&meson8b_pinctrl_driver);
}
arch_initcall(meson8b_pmx_init);
module_exit(meson8b_pmx_exit);
MODULE_DESCRIPTION("meson8b pin control driver");
MODULE_LICENSE("GPL v2");

View File

@@ -485,23 +485,7 @@ static struct meson_bank mesonaxg_aobus_banks[] = {
0, 30, 0, 14, 0, 14, 0, 31, 1, 31),
};
struct meson_pinctrl_data meson_axg_periphs_pinctrl_data = {
.name = "periphs-banks",
.meson_pins = mesonaxg_periphs_pins,
.banks = mesonaxg_periphs_banks,
.num_pins = ARRAY_SIZE(mesonaxg_periphs_pins),
.num_banks = ARRAY_SIZE(mesonaxg_periphs_banks),
};
struct meson_pinctrl_data meson_axg_aobus_pinctrl_data = {
.name = "aobus-banks",
.meson_pins = mesonaxg_aobus_pins,
.banks = mesonaxg_aobus_banks,
.num_pins = ARRAY_SIZE(mesonaxg_aobus_pins),
.num_banks = ARRAY_SIZE(mesonaxg_aobus_banks),
};
int meson_axg_aobus_init(struct meson_pinctrl *pc)
static int meson_axg_aobus_init(struct meson_pinctrl *pc)
{
struct arm_smccc_res res;
/*set TEST_N to output*/
@@ -509,3 +493,57 @@ int meson_axg_aobus_init(struct meson_pinctrl *pc)
return 0;
}
static struct meson_pinctrl_data meson_axg_periphs_pinctrl_data = {
.name = "periphs-banks",
.pinmux_type = PINMUX_V2,
.init = NULL,
.meson_pins = mesonaxg_periphs_pins,
.banks = mesonaxg_periphs_banks,
.num_pins = ARRAY_SIZE(mesonaxg_periphs_pins),
.num_banks = ARRAY_SIZE(mesonaxg_periphs_banks),
};
static struct meson_pinctrl_data meson_axg_aobus_pinctrl_data = {
.name = "aobus-banks",
.pinmux_type = PINMUX_V2,
.init = meson_axg_aobus_init,
.meson_pins = mesonaxg_aobus_pins,
.banks = mesonaxg_aobus_banks,
.num_pins = ARRAY_SIZE(mesonaxg_aobus_pins),
.num_banks = ARRAY_SIZE(mesonaxg_aobus_banks),
};
static const struct of_device_id meson_axg_pinctrl_dt_match[] = {
{
.compatible = "amlogic,meson-axg-periphs-pinctrl",
.data = &meson_axg_periphs_pinctrl_data,
},
{
.compatible = "amlogic,meson-axg-aobus-pinctrl",
.data = &meson_axg_aobus_pinctrl_data,
},
};
static struct platform_driver meson_axg_pinctrl_driver = {
.probe = meson_pinctrl_probe,
.driver = {
.name = "meson-axg-pinctrl",
.of_match_table = meson_axg_pinctrl_dt_match,
},
};
static int __init axg_pmx_init(void)
{
return platform_driver_register(&meson_axg_pinctrl_driver);
}
static void __exit axg_pmx_exit(void)
{
platform_driver_unregister(&meson_axg_pinctrl_driver);
}
arch_initcall(axg_pmx_init);
module_exit(axg_pmx_exit);
MODULE_DESCRIPTION("axg pin control driver");
MODULE_LICENSE("GPL v2");

View File

@@ -1151,40 +1151,7 @@ static struct meson_bank meson_gxl_aobus_banks[] = {
0, 30, 0, 14, 0, 14, 0, 31, 1, 31),
};
struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = {
.name = "periphs-banks",
.pins = meson_gxl_periphs_pins,
.groups = meson_gxl_periphs_groups,
.funcs = meson_gxl_periphs_functions,
.banks = meson_gxl_periphs_banks,
.num_pins = ARRAY_SIZE(meson_gxl_periphs_pins),
.num_groups = ARRAY_SIZE(meson_gxl_periphs_groups),
.num_funcs = ARRAY_SIZE(meson_gxl_periphs_functions),
.num_banks = ARRAY_SIZE(meson_gxl_periphs_banks),
};
struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = {
.name = "aobus-banks",
.pins = meson_gxl_aobus_pins,
.groups = meson_gxl_aobus_groups,
.funcs = meson_gxl_aobus_functions,
.banks = meson_gxl_aobus_banks,
.num_pins = ARRAY_SIZE(meson_gxl_aobus_pins),
.num_groups = ARRAY_SIZE(meson_gxl_aobus_groups),
.num_funcs = ARRAY_SIZE(meson_gxl_aobus_functions),
.num_banks = ARRAY_SIZE(meson_gxl_aobus_banks),
};
int meson_gxl_aobus_init(struct meson_pinctrl *pc)
{
struct arm_smccc_res res;
/*set TEST_N to output*/
arm_smccc_smc(CMD_TEST_N_DIR, TEST_N_OUTPUT, 0, 0, 0, 0, 0, 0, &res);
return 0;
}
int meson_gxl_periphs_init(struct meson_pinctrl *pc)
static int meson_gxl_periphs_init(struct meson_pinctrl *pc)
{
void __iomem *reg;
@@ -1207,3 +1174,76 @@ int meson_gxl_periphs_init(struct meson_pinctrl *pc)
return 0;
}
static int meson_gxl_aobus_init(struct meson_pinctrl *pc)
{
struct arm_smccc_res res;
/*set TEST_N to output*/
arm_smccc_smc(CMD_TEST_N_DIR, TEST_N_OUTPUT, 0, 0, 0, 0, 0, 0, &res);
return 0;
}
static struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = {
.name = "periphs-banks",
.pinmux_type = PINMUX_V1,
.init = meson_gxl_periphs_init,
.pins = meson_gxl_periphs_pins,
.groups = meson_gxl_periphs_groups,
.funcs = meson_gxl_periphs_functions,
.banks = meson_gxl_periphs_banks,
.num_pins = ARRAY_SIZE(meson_gxl_periphs_pins),
.num_groups = ARRAY_SIZE(meson_gxl_periphs_groups),
.num_funcs = ARRAY_SIZE(meson_gxl_periphs_functions),
.num_banks = ARRAY_SIZE(meson_gxl_periphs_banks),
};
static struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = {
.name = "aobus-banks",
.pinmux_type = PINMUX_V1,
.init = meson_gxl_aobus_init,
.pins = meson_gxl_aobus_pins,
.groups = meson_gxl_aobus_groups,
.funcs = meson_gxl_aobus_functions,
.banks = meson_gxl_aobus_banks,
.num_pins = ARRAY_SIZE(meson_gxl_aobus_pins),
.num_groups = ARRAY_SIZE(meson_gxl_aobus_groups),
.num_funcs = ARRAY_SIZE(meson_gxl_aobus_functions),
.num_banks = ARRAY_SIZE(meson_gxl_aobus_banks),
};
static const struct of_device_id meson_gxl_pinctrl_dt_match[] = {
{
.compatible = "amlogic,meson-gxl-periphs-pinctrl",
.data = &meson_gxl_periphs_pinctrl_data,
},
{
.compatible = "amlogic,meson-gxl-aobus-pinctrl",
.data = &meson_gxl_aobus_pinctrl_data,
},
};
static struct platform_driver meson_gxl_pinctrl_driver = {
.probe = meson_pinctrl_probe,
.driver = {
.name = "meson-gxl-pinctrl",
.of_match_table = meson_gxl_pinctrl_dt_match,
},
};
static int __init gxl_pmx_init(void)
{
return platform_driver_register(&meson_gxl_pinctrl_driver);
}
static void __exit gxl_pmx_exit(void)
{
platform_driver_unregister(&meson_gxl_pinctrl_driver);
}
arch_initcall(gxl_pmx_init);
module_exit(gxl_pmx_exit);
MODULE_DESCRIPTION("gxl pin control driver");
MODULE_LICENSE("GPL v2");