arm64: dts: rockchip: add rk3588 nvr demo V10 Board

Signed-off-by: Huang zhibao <hzb@rock-chips.com>
Change-Id: Iebafff8398966758ed9500656f5af2bf6f86d047
This commit is contained in:
Huang zhibao
2021-11-02 11:34:34 +08:00
committed by Tao Huang
parent 11e33efe53
commit aac2ef1f0a
4 changed files with 599 additions and 0 deletions

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@@ -99,6 +99,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb5-lp4-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb5-lp4-v10-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb6-lp4-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb6-lp4-v10-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nvr-demo-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-evb1-lp4x-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-evb1-lp4x-v10-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-evb2-lp5-v10.dtb

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@@ -0,0 +1,15 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
#include "rk3588-nvr-demo.dtsi"
#include "rk3588-linux.dtsi"
/ {
model = "Rockchip RK3588 NVR DEMO LP4 V10 Board";
compatible = "rockchip,rk3588-nvr-demo-v10", "rockchip,rk3588";
};

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@@ -0,0 +1,464 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/
#include "rk3588.dtsi"
#include "rk3588-nvr.dtsi"
#include "rk806-single.dtsi"
/ {
i2s0_sound: i2s0-sound {
status = "okay";
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,name = "rockchip,es8311";
simple-audio-card,dai-link@0 {
format = "i2s";
cpu {
sound-dai = <&i2s0_8ch>;
};
codec {
sound-dai = <&es8311>;
};
};
};
leds: leds {
compatible = "gpio-leds";
hdd_led: hdd-led {
gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
net_led: net-led {
gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
work_led: work-led {
gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
pcie30_avdd0v75: pcie30-avdd0v75 {
compatible = "regulator-fixed";
regulator-name = "pcie30_avdd0v75";
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
vin-supply = <&nldo5_s0>;
};
pcie30_avdd1v8: pcie30-avdd1v8 {
compatible = "regulator-fixed";
regulator-name = "pcie30_avdd1v8";
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&avcc_1v8_s0>;
};
vcc12v_dcin: vcc12v-dcin {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
vcc3v3_pcie30: vcc3v3-pcie30 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
startup-delay-us = <5000>;
vin-supply = <&vcc12v_dcin>;
};
vcc5v0_sys: vcc5v0-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc12v_dcin>;
};
vcc5v0_host: vcc5v0-host-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_sys>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
};
vcc5v0_otg: vcc5v0-otg-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_otg";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_sys>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_otg_en>;
};
};
&combphy0_ps {
status = "okay";
};
&combphy1_ps {
status = "okay";
};
&combphy2_psu {
status = "okay";
};
&i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c0m2_xfer>;
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
es8311: es8311@18 {
status = "okay";
compatible = "everest,es8311";
reg = <0x18>;
#sound-dai-cells = <0>;
clocks = <&cru I2S0_8CH_MCLKOUT>;
clock-names = "mclk";
assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
assigned-clock-rates = <12288000>;
pinctrl-names = "default";
pinctrl-0 = <&i2s0_mclk>;
};
};
&i2c4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m3_xfer>;
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
hym8563: hym8563@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
pinctrl-names = "default";
pinctrl-0 = <&rtc_int>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
};
};
&i2s0_8ch {
status = "okay";
pinctrl-0 = <&i2s0_lrck
&i2s0_sclk
&i2s0_sdi0
&i2s0_sdo0>;
};
&nldo5_s0 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
rregulator-name = "nldo5_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
&pcie30phy {
status = "okay";
};
&pcie3x4 {
reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};
&pwm3 {
compatible = "rockchip,remotectl-pwm";
pinctrl-names = "default";
pinctrl-0 = <&pwm3m0_pins>;
remote_pwm_id = <3>;
handle_cpu_id = <1>;
remote_support_psci = <0>;
status = "okay";
ir_key1 {
rockchip,usercode = <0x4040>;
rockchip,key_table =
<0xf2 KEY_REPLY>,
<0xba KEY_BACK>,
<0xf4 KEY_UP>,
<0xf1 KEY_DOWN>,
<0xef KEY_LEFT>,
<0xee KEY_RIGHT>,
<0xbd KEY_HOME>,
<0xea KEY_VOLUMEUP>,
<0xe3 KEY_VOLUMEDOWN>,
<0xe2 KEY_SEARCH>,
<0xb2 KEY_POWER>,
<0xbc KEY_MUTE>,
<0xec KEY_MENU>,
<0xbf 0x190>,
<0xe0 0x191>,
<0xe1 0x192>,
<0xe9 183>,
<0xe6 248>,
<0xe8 185>,
<0xe7 186>,
<0xf0 388>,
<0xbe 0x175>;
};
ir_key2 {
rockchip,usercode = <0xff00>;
rockchip,key_table =
<0xf9 KEY_HOME>,
<0xbf KEY_BACK>,
<0xfb KEY_MENU>,
<0xaa KEY_REPLY>,
<0xb9 KEY_UP>,
<0xe9 KEY_DOWN>,
<0xb8 KEY_LEFT>,
<0xea KEY_RIGHT>,
<0xeb KEY_VOLUMEDOWN>,
<0xef KEY_VOLUMEUP>,
<0xf7 KEY_MUTE>,
<0xe7 KEY_POWER>,
<0xfc KEY_POWER>,
<0xa9 KEY_VOLUMEDOWN>,
<0xa8 KEY_PLAYPAUSE>,
<0xe0 KEY_VOLUMEDOWN>,
<0xa5 KEY_VOLUMEDOWN>,
<0xab 183>,
<0xb7 388>,
<0xe8 388>,
<0xf8 184>,
<0xaf 185>,
<0xed KEY_VOLUMEDOWN>,
<0xee 186>,
<0xb3 KEY_VOLUMEDOWN>,
<0xf1 KEY_VOLUMEDOWN>,
<0xf2 KEY_VOLUMEDOWN>,
<0xf3 KEY_SEARCH>,
<0xb4 KEY_VOLUMEDOWN>,
<0xa4 KEY_SETUP>,
<0xbe KEY_SEARCH>;
};
ir_key3 {
rockchip,usercode = <0x1dcc>;
rockchip,key_table =
<0xee KEY_REPLY>,
<0xf0 KEY_BACK>,
<0xf8 KEY_UP>,
<0xbb KEY_DOWN>,
<0xef KEY_LEFT>,
<0xed KEY_RIGHT>,
<0xfc KEY_HOME>,
<0xf1 KEY_VOLUMEUP>,
<0xfd KEY_VOLUMEDOWN>,
<0xb7 KEY_SEARCH>,
<0xff KEY_POWER>,
<0xf3 KEY_MUTE>,
<0xbf KEY_MENU>,
<0xf9 0x191>,
<0xf5 0x192>,
<0xb3 388>,
<0xbe KEY_1>,
<0xba KEY_2>,
<0xb2 KEY_3>,
<0xbd KEY_4>,
<0xf9 KEY_5>,
<0xb1 KEY_6>,
<0xfc KEY_7>,
<0xf8 KEY_8>,
<0xb0 KEY_9>,
<0xb6 KEY_0>,
<0xb5 KEY_BACKSPACE>;
};
};
&sata0 {
status = "okay";
};
&sata1 {
status = "okay";
};
&sdhci {
bus-width = <8>;
no-sdio;
no-sd;
non-removable;
max-frequency = <200000000>;
status = "okay";
};
&pinctrl {
rtc {
rtc_int: rtc-int {
rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
vcc5v0_otg_en: vcc5v0-otg-en {
rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sata {
sata0_pm_reset: sata0-pm-reset {
rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_output_high>;
};
sata1_pm_reset: sata1-pm-reset {
rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_output_high>;
};
};
};
&u2phy0 {
status = "okay";
};
&u2phy1 {
status = "okay";
};
&u2phy2 {
status = "okay";
};
&u2phy3 {
status = "okay";
};
&u2phy0_otg {
vbus-supply = <&vcc5v0_otg>;
status = "okay";
};
&u2phy1_otg {
phy-supply = <&vcc5v0_host>;
status = "okay";
};
&u2phy2_host {
phy-supply = <&vcc5v0_host>;
status = "okay";
};
&u2phy3_host {
phy-supply = <&vcc5v0_host>;
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};
&usbdp_phy0 {
status = "okay";
};
&usbdp_phy0_dp {
status = "okay";
};
&usbdp_phy0_u3 {
status = "okay";
};
&usbdp_phy1 {
status = "okay";
};
&usbdp_phy1_dp {
status = "okay";
};
&usbdp_phy1_u3 {
status = "disabled";
};
&usbdrd3_0 {
status = "okay";
};
&usbdrd3_1 {
status = "okay";
};
&usbdrd_dwc3_0 {
dr_mode = "peripheral";
maximum-speed = "high-speed";
status = "okay";
};
&usbdrd_dwc3_1 {
dr_mode = "host";
maximum-speed = "high-speed";
status = "okay";
};
&usbhost3_0 {
status = "okay";
};
&usbhost_dwc3_0 {
dr_mode = "host";
maximum-speed = "high-speed";
status = "okay";
};

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@@ -0,0 +1,119 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/input/rk-input.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/display/rockchip_vop.h>
#include <dt-bindings/sensor-dev.h>
/ {
adc_keys: adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 1>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
poll-interval = <100>;
vol-up-key {
label = "volume up";
linux,code = <KEY_VOLUMEUP>;
press-threshold-microvolt = <1750>;
};
};
test-power {
status = "okay";
};
};
&iep {
status = "okay";
};
&iep_mmu {
status = "okay";
};
&jpegd {
status = "okay";
};
&jpegd_mmu {
status = "okay";
};
&jpege0 {
status = "okay";
};
&jpege0_mmu {
status = "okay";
};
&mpp_srv {
status = "okay";
};
&rkvdec0 {
status = "disabled";
};
&rkvdec0_mmu {
status = "disabled";
};
&rkvenc0 {
status = "okay";
};
&rkvenc0_mmu {
status = "okay";
};
&saradc {
status = "okay";
vref-supply = <&vcc_1v8_cam_s0>;
};
&vdpu {
status = "okay";
};
&vdpu_mmu {
status = "okay";
};
&vop {
status = "okay";
};
&vop_mmu {
status = "okay";
};
/* vp0 & vp1 splice for 8K output */
&vp0 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART0>;
};
&vp1 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART1>;
};
&vp2 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART2>;
};
&vp3 {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART3>;
};