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drm/rockchip: vop2: Add port mux translation for rk3588 mipi dsi

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The port mux configuration of two mipi dsi hosts on rk3588 break
the direct mapping rules used on other soc and other connector
interfaces. We need add a translation here.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: If3d6ae26c685e40e00e8c783b28856be3ec2d524
This commit is contained in:
Andy Yan
2021-10-29 17:54:00 +08:00
committed by Tao Huang
parent 6711962e5f
commit ab4a52e2ee
2 changed files with 27 additions and 3 deletions
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28
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
View File

@@ -5148,6 +5148,26 @@ static void vop2_crtc_enable_dsc(struct drm_crtc *crtc, struct drm_crtc_state *o
dsc->enabled = true;
}
/*
* MIPI port mux on rk3588:
* 0: Video Port2
* 1: Video Port3
* 3: Video Port 1(MIPI1 only)
*/
static int vop2_get_mipi_port_mux(struct vop2 *vop2, int vp_id)
{
if (vop2->version == VOP_VERSION_RK3588) {
if (vp_id == 1)
return 3;
else if (vp_id == 3)
return 1;
else
return 0;
} else {
return vp_id;
}
}
static void vop2_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state)
{
struct vop2_video_port *vp = to_vop2_video_port(crtc);
@@ -5180,6 +5200,7 @@ static void vop2_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_crtc_state
struct vop2_clk *if_dclk = NULL;
struct vop2_clk *dclk, *dclk_out, *dclk_core;
int splice_en = 0;
int port_mux;
int ret;
vop2->active_vp_mask |= BIT(vp->id);
@@ -5286,8 +5307,9 @@ static void vop2_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_crtc_state
goto out;
if (if_pixclk)
VOP_CTRL_SET(vop2, mipi0_pixclk_div, if_pixclk->div_val);
port_mux = vop2_get_mipi_port_mux(vop2, vp_data->id);
VOP_CTRL_SET(vop2, mipi0_en, 1);
VOP_CTRL_SET(vop2, mipi0_mux, vp_data->id);
VOP_CTRL_SET(vop2, mipi0_mux, port_mux);
VOP_CTRL_SET(vop2, mipi_pin_pol, val);
VOP_CTRL_SET(vop2, mipi_dclk_pol, dclk_inv);
}
@@ -5299,8 +5321,10 @@ static void vop2_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_crtc_state
if (if_pixclk)
VOP_CTRL_SET(vop2, mipi1_pixclk_div, if_pixclk->div_val);
port_mux = vop2_get_mipi_port_mux(vop2, vp_data->id);
VOP_CTRL_SET(vop2, mipi1_en, 1);
VOP_CTRL_SET(vop2, mipi1_mux, vp_data->id);
VOP_CTRL_SET(vop2, mipi1_mux, port_mux);
VOP_CTRL_SET(vop2, mipi_pin_pol, val);
VOP_CTRL_SET(vop2, mipi_dclk_pol, dclk_inv);
}

2
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
View File

@@ -2394,7 +2394,7 @@ static const struct vop2_ctrl rk3588_vop_ctrl = {
.edp0_mux = VOP_REG(RK3568_DSP_IF_EN, 0x3, 16),
.hdmi1_mux = VOP_REG(RK3568_DSP_IF_EN, 0x3, 18),
.edp1_mux = VOP_REG(RK3568_DSP_IF_EN, 0x3, 18),
.mipi0_mux = VOP_REG(RK3568_DSP_IF_EN, 0x3, 20),
.mipi0_mux = VOP_REG(RK3568_DSP_IF_EN, 0x1, 20),
.mipi1_mux = VOP_REG(RK3568_DSP_IF_EN, 0x3, 21),
.bt656_yc_swap = VOP_REG(RK3568_DSP_IF_CTRL, 0x1, 1),
.bt1120_yc_swap = VOP_REG(RK3568_DSP_IF_CTRL, 0x1, 5),